Word Line Voltage Boosting Circuit for Semiconductor Storage

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Solution Overview

Problem

In semiconductor storage apparatuses like DRAM and FeRAM, the existing methods for boosting the voltage of word lines to improve data writing efficiency are limited by precision and power consumption, with capacitive coupling providing a small circuit but not allowing for high boost levels.

Innovation Solution

A semiconductor storage apparatus is designed with a boost driver circuit that includes a PMOS transistor, an NMOS transistor, and a voltage-drop circuit, which generates a voltage drop between two voltages, allowing the boost driver to increase the word line voltage beyond the supply voltage through capacitive coupling, with the PMOS and NMOS transistors driving the boost capacitor to achieve a precise voltage boost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If capacitive coupling is used to boost word line voltage, then the circuit size remains small, but the boost level cannot be set high precisely

Engineering Contradiction:
Improveboost level precisionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a boost capacitor as an intermediary element between the word line and the boost driver. This capacitor enables precise voltage boosting by storing and transferring charge in a controlled manner, allowing the word line voltage to be boosted to a higher level than the supply voltage while maintaining circuit simplicity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the voltage parameter of the word line by using the boost driver to vary the capacitor voltage. The boost driver adjusts the voltage across the boost capacitor to achieve the desired word line voltage level, enabling precise control of the boost amount through parameter adjustment

Inventive Principle:
Principle #35Parameter changes

2Productivity

If word line voltage is boosted to improve data writing speed, then productivity increases, but power consumption increases

Engineering Contradiction:
Improvedata writing speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The boost driver operates periodically rather than continuously, activating only when word line voltage boosting is required for data writing operations. This periodic operation reduces overall power consumption while maintaining high data writing speed when needed

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The boost capacitor stores energy during periods when boosting is not needed and releases it when required, effectively serving itself to provide the necessary voltage boost without continuous power supply, thereby reducing overall power consumption

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances data writing speed and precision by allowing the word line voltage to be boosted to a higher level than the supply voltage, improving data writing efficiency while maintaining low power consumption.

Implementation Method 1

the boost driver to increase the word line voltage beyond the supply voltage through capacitive coupling

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

a voltage-drop circuit configured to generate a given voltage drop between a first voltage and a second voltage

Methodology Applied
Scientific EffectVoltage drop: Electrical Resistance

Data Source

PatentUS8503247B2Semiconductor storage apparatus, and method and system for boosting word lines
Publication Date: 2013.08.06 RAMXEED LTD
  • US8503247B2 patent drawing
  • US8503247B2 patent drawing
  • US8503247B2 patent drawing

AI summary

A semiconductor storage apparatus includes: a word line coupled to a cell transistor; a first capacitor having a first end coupled to the word line; a boost driver coupled to a second end of the first capacitor; a voltage-drop circuit configured to generate a given voltage drop between a first voltage and a second voltage; and a boost-drive circuit configured to boost a voltage at the second end from the second voltage to the first voltage.