Word Line Voltage Ramp Control for 3D NAND Disturb Mitigation
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Solution Overview
Problem
In memory devices, particularly in 3D NAND structures, memory cells experience disturbs due to channel gradients during programming operations, leading to increased threshold voltage over time, which can result in data state shifts and reduced reliability.
Innovation Solution
Modifying the timing and voltage increase patterns for word lines, including delayed and stepped increases, and adjusting initial voltages based on the position of word lines within a multi-tier stack to reduce channel gradients and mitigate hot electron injection disturbs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If word line voltage is increased rapidly during programming, then programming speed is improved, but channel gradients increase causing hot electron injection disturbs
Solution Approach 1:
The patent applies preliminary action by performing a pre-charge operation before the main programming operation. During pre-charge, bit lines are charged to a first voltage level and word lines are set to a second voltage level, preparing the memory device in advance. This preliminary preparation reduces the severity of channel gradients during subsequent programming, thereby mitigating hot electron injection disturbs while maintaining programming speed.
Solution Approach 2:
The patent implements dynamics by using different voltage levels for different operational phases. During pre-charge, bit lines are at a first voltage level and word lines are at a second voltage level. During programming, these voltages dynamically change to appropriate levels. This dynamic voltage adjustment optimizes both programming speed and reduces channel gradients, resolving the contradiction between speed and disturbs.
2Reliability
If pre-charge voltage levels are increased to reduce channel gradients, then programming reliability is improved, but energy consumption increases
Solution Approach 1:
The patent applies parameter changes by using different voltage levels for different word line groups during pre-charge and programming operations. Specifically, first group word lines (including the selected word line) are maintained at a first voltage level, while second group word lines are maintained at a second voltage level. This differentiated parameter approach reduces channel gradients and improves programming reliability without requiring uniformly high voltage across all word lines, thereby controlling energy consumption.
3Object-affected harmful factors
If delayed ramp up of selected word line voltage is implemented, then hot electron injection disturbs are reduced, but programming time increases
Solution Approach 1:
The patent applies preliminary action by performing the pre-charge operation before programming, during which bit lines are charged and word lines are prepared at appropriate voltage levels. This advance preparation creates favorable conditions for subsequent programming, allowing the selected word line to be ramped up more gradually without extending total programming time. The preliminary setup reduces channel gradients early, mitigating hot electron injection disturbs while maintaining efficient timing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces channel gradients and minimizes the impact of hot electron injection disturbs, thereby maintaining data integrity and extending the operational lifespan of memory cells by stabilizing threshold voltages.
Implementation Method 1
the control circuit is configured to increase voltages of a first group of unselected word lines adjacent to the selected word line in a stepped and delayed manner compared to increasing voltages of a second group of unselected word lines not adjacent to the selected word line
Data Source
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AI summary
A memory device and associated techniques for reducing hot electron injection type of disturbs of memory cells. In one approach, after a pre-charge operation, voltages of a first group of adjacent word lines comprising a selected word line (WLn) and one or more drain-side word lines of WLn are increased after voltages of remaining word lines are increased. In another approach, after the pre-charge operation, voltages of the first group of adjacent word lines are increased in steps while voltages of remaining word lines are continuously increased. In another approach, voltages of the first group of adjacent word lines are increased from a negative voltage while voltages of remaining word lines are increased from 0 V. In another aspect, the disturb countermeasures can be implemented according to the position of WLn in a multi-tier stack.