Nonvolatile Memory Word Line Voltage Synchronization

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Solution Overview

Problem

The increasing integration degree and memory capacity of nonvolatile memory devices, such as vertical NAND memory devices, lead to increased signal line loads and decreased operation speeds.

Innovation Solution

A method and device for operating a nonvolatile memory device by synchronizing the voltage changes of a selected word line with adjacent word lines, reducing the load on the selected word line by increasing or decreasing the voltage of the adjacent word line in the same direction, thereby reducing voltage setup time and enhancing operation speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the integration degree and memory capacity of nonvolatile memory devices are increased, then the storage capacity is improved, but the operation speed is decreased due to increased signal line loads

Engineering Contradiction:
Improvememory capacityVSAvoidoperation speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The voltage of the adjacent word line is changed in advance to the same level as the selected word line before the selected word line voltage changes. This preliminary action reduces the load on the selected word line during voltage transitions, thereby reducing voltage setup time and maintaining faster operation speeds even as memory capacity increases

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By pre-charging or pre-discharging the adjacent word line to match the selected word line's voltage level, the invention counteracts the capacitive loading effect that would otherwise slow down the selected word line voltage transitions. This preliminary anti-action eliminates the harmful delay caused by signal line loads

Inventive Principle:
Principle #9Preliminary anti-action

2Measurement precision

If the voltage of the selected word line is changed sequentially to different read voltages, then the read operation accuracy is improved, but the operation speed is decreased due to extended voltage setup time

Engineering Contradiction:
Improveread operation accuracyVSAvoidvoltage setup time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The adjacent word line voltage is changed in advance to the same level as the selected word line before the selected word line voltage changes. This preliminary action reduces the load on the selected word line during voltage transitions, thereby reducing voltage setup time and maintaining faster operation speeds even as memory capacity increases

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention uses feedback control where the voltage changing timing of the adjacent word line is synchronized with the selected word line voltage changing time points. This coordination ensures that the adjacent word line is always ready to minimize loading effects during the sequential voltage transitions required for accurate multi-level cell reading

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The synchronization of voltage changes between the selected and adjacent word lines reduces the load on the selected word line, resulting in faster operation speeds and improved performance of nonvolatile memory devices.

Implementation Method 1

synchronizing the voltage changes of a selected word line with adjacent word lines, reducing the load on the selected word line by increasing or decreasing the voltage of the adjacent word line in the same direction

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS10748617B2Nonvolatile memory device and method of operating the same
Publication Date: 2020.08.18 SAMSUNG ELECTRONICS CO LTD
  • US10748617B2 patent drawing
  • US10748617B2 patent drawing
  • US10748617B2 patent drawing

AI summary

A method of operating a nonvolatile memory device is provided where the nonvolatile memory device includes a plurality of cell strings, and each cell string includes a plurality of multi-level cells. a voltage of a selected word line is sequentially changed to sequentially have a plurality of read voltages for determining threshold voltage states of the plurality of multi-level cells. A voltage of an adjacent word line adjacent to the selected word line is sequentially changed in synchronization with voltage changing time points of the selected word line. A load of the selected word line is reduced and an operation speed of the nonvolatile memory device is increased by synchronizing the voltage change of the selected word line and the voltage change of the adjacent word line in the same direction.