DRAM Wordline Voltage Control Circuit for Power Reduction

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Solution Overview

Problem

DRAM modules require frequent refreshing, leading to high power consumption in electronic devices, which is a concern for reducing power consumption in mobile devices.

Innovation Solution

A DRAM wordline voltage control circuit comprising a sensing module, an oscillator, and a charging pump that adjusts the wordline voltage by generating a second control signal based on feedback, enabling the oscillator to output an oscillating signal and increasing the voltage value only when necessary, thereby reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If DRAM is refreshed frequently to maintain stored data, then data reliability is improved, but power consumption increases

Engineering Contradiction:

Improvedata reliabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic voltage boosting to the wordline only during refresh operations rather than continuously. The control circuit detects refresh mode and activates the voltage boost circuit periodically during refresh cycles, reducing overall power consumption while maintaining data reliability through timely refresh operations.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent dynamically changes the wordline voltage parameter based on operational mode. During refresh operations, the wordline voltage is boosted to a higher level (e.g., from 1.2V to 2.4V) to ensure reliable data retention. During normal read/write operations, the voltage remains at the standard level, optimizing power consumption while maintaining data reliability when needed.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If voltage is continuously boosted to maintain wordline voltage levels, then DRAM refresh reliability is improved, but power consumption increases

Engineering Contradiction:

ImproveDRAM refresh reliabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The control circuit is designed to activate the voltage boost circuit only during refresh mode operations. The circuit detects the refresh mode signal and periodically enables the boost function during refresh cycles while keeping it disabled during normal operations, ensuring refresh reliability when needed while minimizing power consumption.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The control circuit incorporates feedback mechanisms to detect the operational mode of the DRAM. Based on the detected mode (refresh or normal operation), the control circuit dynamically adjusts whether to activate the voltage boost circuit, ensuring that voltage boosting occurs only when necessary for refresh operations, thereby balancing reliability and power consumption.

Inventive Principle:

Principle #23Feedback

3Device complexity

If a simple voltage control circuit is used, then device complexity is reduced, but power consumption control capability deteriorates

Engineering Contradiction:

Improvedevice complexityVSAvoidpower consumption control capability

Core Design Contradiction:

Device complexityVSUse of energy by moving object

Solution Approach 1:

The voltage control function is segmented into separate modules: a control circuit that detects operational mode, a voltage boost circuit that performs the actual voltage increase, and a wordline driver that applies the voltage. This segmentation allows the system to activate only the necessary components during refresh operations, improving power control capability while keeping each individual module relatively simple.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The control circuit acts as an intermediary between the DRAM refresh control signal and the voltage boost circuit. It receives the refresh mode signal, processes it to determine when voltage boosting is needed, and activates the boost circuit accordingly. This intermediary layer provides intelligent power management without requiring complex circuitry throughout the entire system.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9318186B1DRAM wordline control circuit, DRAM module and method of controlling DRAM wordline voltage

Publication Date: 2016.04.19 NAN YA TECH

AI summary

A DRAM wordline voltage control circuit includes a sensing module, an oscillator and a charging pump. The sensing module is configured to receive a first control signal and a feedback signal corresponding to a wordline voltage signal, and generate a second control signal according to the first control signal and the feedback signal corresponding to the wordline voltage signal. The oscillator is electrically connected with the sensing module. The oscillator is configured to receive the second control signal and output an oscillating signal when the second control signal is enabled. The charging pump is electrically connected with the oscillator. The charging pump is configured to increase a voltage value of the wordline voltage signal when the oscillator outputs the oscillating signal.