Work Function Metal Patterning With Self-Aligned Cap Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The scaling down of semiconductor integrated circuits is limited by unsatisfactory mask overlay in photolithography processes, leading to incomplete removal of hard mask layers and deviations in design threshold voltage levels due to residual hard mask layers, which hinder the deposition of work function layers.
Innovation Solution
A method involving the formation of a protection layer, a cap layer, and a hard mask layer, where the cap layer introduces self-alignment and serves as a sacrificial layer, allowing selective exposure of active regions for work function metal layer deposition even with inaccurate mask overlay, thereby enlarging the overlay process window and improving the formation of different work function metal layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If photolithography mask overlay is used for patterning, then device scaling and chip density are improved, but mask overlay precision deteriorates leading to incomplete hard mask removal
Solution Approach 1:
A cap layer is introduced as an intermediary between the hard mask layer and the work function metal layer. This cap layer serves as a sacrificial element that can be selectively removed to expose the underlying hard mask layer for complete removal, thereby compensating for imperfect mask overlay and enabling complete hard mask removal without requiring perfect alignment
Solution Approach 2:
The cap layer is deposited in advance over the hard mask layer before work function metal deposition. This preliminary action creates a protective and sacrificial structure that facilitates subsequent selective removal processes, allowing the hard mask to be completely removed even when mask overlay is imperfect
2Reliability
If hard mask layer is not completely removed due to imperfect overlay, then work function metal deposition is hindered, but improving mask overlay precision increases process difficulty and cost
Solution Approach 1:
The cap layer acts as a mediator that decouples the deposition quality of work function metal from the precision of mask overlay. By providing a sacrificial removal path, it ensures that work function metal can be deposited reliably even when hard mask removal is challenging due to overlay imperfections
Solution Approach 2:
The cap layer is designed as a disposable sacrificial layer that is easily removed to facilitate hard mask removal. This temporary structure enables complete hard mask removal and reliable work function metal deposition without requiring complex patterning processes or perfect mask overlay
3Manufacturing precision
If cap layer is made selectively removable to enable self-alignment, then overlay process window is enlarged, but additional process steps are required
Solution Approach 1:
The cap layer serves as a selective intermediary that enables self-aligned removal processes. Its selective removability allows for enlarged overlay process windows by providing a controlled path to access and remove the hard mask layer without requiring precise mask alignment
Solution Approach 2:
The cap layer enables self-aligned removal where the removal process automatically aligns with the underlying structures. The selective etch process uses the cap layer itself as the alignment reference, eliminating the need for additional alignment steps and simplifying the overall process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the accuracy and yield of work function metal layer formation, reducing residual hard mask layer issues and maintaining design threshold voltage levels, thus facilitating the scaling down of semiconductor devices.
Implementation Method 1
a cap layer that can be selectively etched without damaging the hard mask layer
Implementation Method 2
formation of a protection layer over active regions and a cap layer, which serves as an etch stop
Implementation Method 3
a cap layer, which serves as an etch stop and enables self-alignment in patterning
Data Source
AI summary
Semiconductor structures and methods of forming the same are provided. A semiconductor structure according to the present disclosure includes at least one first semiconductor element and at least one second semiconductor element over a substrate, a dielectric fin disposed between the at least one first semiconductor element and the at least one second semiconductor element, a first work function metal layer wrapping around each of the at least one first semiconductor element and extending continuously from the at least one first semiconductor element to a top surface of the dielectric fin, and a second work function metal layer disposed over the at least one second semiconductor element and the first work function metal layer.