Work Function Metal Patterning on High-K Dielectric
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existence of a barrier layer in high-k dielectric and metal gate processes limits the patterning window of work function metals, making it challenging to control threshold values and leading to device performance issues.
Innovation Solution
Forming a work function metal layer directly onto the high-k dielectric layer, using the high-k dielectric as an etch stop layer to improve the patterning window, and sequentially adding additional work function metal layers to achieve desired work functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a barrier layer is formed between the work function metal layer and the high-k dielectric layer to protect the high-k dielectric layer, then the high-k dielectric layer is protected from damage during patterning, but the patterning window of the work function metals is limited and the patterning precision deteriorates
Solution Approach 1:
The patent removes the barrier layer from the gate stack structure, eliminating the intermediate layer that was causing patterning precision issues. The work function metal layer is now deposited directly on the high-k dielectric layer, allowing for improved patterning control while the high-k dielectric layer itself serves as the etch stop layer.
Solution Approach 2:
The high-k dielectric layer serves multiple functions: it provides the high-k dielectric property for transistor operation, acts as the etch stop layer during patterning, and eliminates the need for a separate barrier layer. This multi-functionality simplifies the structure and improves patterning precision.
2Reliability
If a barrier layer is used as an etch stop layer for patterning work function metals, then the high-k dielectric layer is protected, but the control of threshold values becomes challenging and device performance deteriorates
Solution Approach 1:
The barrier layer is removed from the structure, eliminating the intermediate layer that was interfering with threshold value control. The direct contact between the work function metal layer and high-k dielectric layer enables precise tuning of work functions and threshold values.
Solution Approach 2:
By removing the barrier layer, the electrical parameters of the gate stack are directly controlled by the work function metal layer properties and the high-k dielectric layer properties, enabling precise adjustment of threshold values through material selection and thickness control without the interfering barrier layer.
3Adaptability or versatility
If multiple metal layers are patterned over the high-k dielectric layer to build different metal gate stacks, then different work functions are achieved, but the process complexity increases due to the barrier layer
Solution Approach 1:
The barrier layer is removed, simplifying the gate stack structure to just the high-k dielectric layer and work function metal layer(s). This reduction in layers decreases process complexity while maintaining the ability to achieve different work functions through selective patterning of metal layers.
Solution Approach 2:
The high-k dielectric layer serves as both the functional dielectric and the etch stop layer for all metal layer patterning operations, providing a universal base layer that simplifies the overall process while enabling diverse metal gate stack configurations.
Data Source
AI summary
The present disclosure relates to an integrated circuit with a work function metal layer disposed directly on a high-k dielectric layer, and an associated method of formation. In some embodiments, the integrated circuit is formed by forming a first work function metal layer directly on a high-k dielectric layer. Then the first work function metal layer is patterned to be left within a first gate region of a first device region and to be removed within a second gate region of a second device region. Thereby, the first work function metal layer is patterned directly on the high-k dielectric layer, using the high-k dielectric layer as an etch stop layer, and the patterning window is improved.