Work Steal Abort Region for Multicore Cache Contention

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Solution Overview

Problem

In multicore systems, work steal mechanisms can lead to decreased execution efficiency due to reduced cache hit rates and potential access contention, which existing technologies fail to effectively manage.

Innovation Solution

An information processing apparatus employing a hardware transactional memory (HTM) function to detect and manage access contention by performing writing and reading processes in abort regions, allowing for efficient task acquisition and execution across processor cores while maintaining data consistency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If work steal mechanism is used to acquire tasks from other processor cores, then task execution flexibility is improved, but cache hit rate decreases and access contention increases

Engineering Contradiction:

Improvetask execution flexibilityVSAvoidcache hit rate

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a reading process for the abort region before the actual task acquisition in the work steal mechanism. This advance check allows the system to detect potential access contention before it occurs, enabling proactive prevention of cache conflicts and abnormal endings, thereby maintaining high cache hit rates while preserving task execution flexibility

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The abort region serves as an intermediary mechanism between the task storage region and the executing processor core. By introducing this intermediate check point, the system can mediate access conflicts between the stealing core and the owner core, preventing direct cache contention while allowing work steal to proceed when safe

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If work steal mechanism is used to acquire tasks from other processor cores, then task execution flexibility is improved, but access contention increases leading to abnormal endings

Engineering Contradiction:

Improvetask execution flexibilityVSAvoidaccess contention

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent performs a reading process for the abort region before task acquisition to detect potential access contention in advance. This preliminary detection mechanism allows the system to identify when another core is executing the task and prevent work steal that would cause abnormal endings, thereby reducing access contention while maintaining execution flexibility

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system implements feedback by continuously monitoring the abort region status during work steal operations. When access contention is detected through the reading process, the system receives feedback to abort or retry the task acquisition, creating a closed-loop control that reduces abnormal endings while preserving task execution flexibility

Inventive Principle:

Principle #23Feedback

3Reliability

If writing process for abort region is performed to detect access contention, then data consistency is improved, but processing overhead increases

Engineering Contradiction:

Improvedata consistencyVSAvoidprocessing overhead

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies local quality by performing the reading process for the abort region only when work steal is attempted, rather than continuously monitoring all task accesses. This selective application of the consistency check minimizes processing overhead while maintaining data consistency for the specific case of cross-core task acquisition

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The system changes the parameter of access mode by using a reading process instead of a writing process for detecting access contention in the abort region. This parameter change from write to read operations significantly reduces processing overhead and memory traffic while still achieving the goal of detecting access contention and maintaining data consistency

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10324751B2Information processing apparatus, information processing method, and non-transitory computer-readable recording medium recording information processing program

Publication Date: 2019.06.18 FUJITSU LTD

AI summary

An information processing apparatus includes: a memory configured to store an information processing program; and a plurality of processor cores configured to acquire and execute a task from a storage region which is provided for each of the processor cores and including a first processor core configured to execute the information processing program, wherein the first processor core: performs, in work steal in which a task stored in a storage region of the first processor core is acquired by a second processor core, a writing process for an abort region, which is provided corresponding to the task, for detecting access contention by the first processor core and the second processor core using a transactional memory function; and performs a reading process for the abort region when the task is to be acquired from the storage region.