Worker Thread Register Initialization for Faster Data Buffer Access

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Solution Overview

Problem

In data parallel operations, each worker thread in a multi-threaded processor spends a significant number of clock cycles locating its associated data set in memory, increasing the time required for operation completion.

Innovation Solution

A hardware module responds to a single instruction to pre-load worker operand registers with variables that enable each thread to identify the memory locations for its data set, using worker identifiers to determine the differences in location.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If each worker thread individually executes instructions to determine the location of its associated data in memory, then the worker thread can locate its data, but a significant number of processor clock cycles are consumed, increasing the length of time until completion of operations

Engineering Contradiction:
Improvetime to locate dataVSAvoidprocessing speed
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing the offset values for each worker thread's data location in a dedicated offset register file before the worker threads begin execution. When a worker thread is initialized, its data location offset is already prepared and immediately loaded into the register, eliminating the need for the worker thread to individually compute its data location during execution. This pre-computation approach directly resolves the contradiction by reducing the time workers spend locating data without sacrificing processing throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism in the form of a supervisor thread and a dedicated offset register file that mediates between the main program and worker threads. The supervisor thread calculates and stores offset values in the offset register file, which then serves as an intermediary storage structure that worker threads can quickly access. This intermediary approach eliminates the direct computation burden from worker threads while maintaining accurate data location information, thereby resolving the time-loss versus productivity contradiction.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple worker threads execute simultaneously with individual data location determination, then parallel processing capability is utilized, but the overall operation completion time increases due to cumulative lookup overhead

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidoperation completion time
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing the offset values for each worker thread's data location in a dedicated offset register file before the worker threads begin execution. When a worker thread is initialized, its data location offset is already prepared and immediately loaded into the register, eliminating the need for the worker thread to individually compute its data location during execution. This pre-computation approach directly resolves the contradiction by reducing the time workers spend locating data without sacrificing processing throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges the data location determination function into the supervisor thread rather than having each worker thread perform it independently. The supervisor thread centralizes the calculation of offsets for all worker threads and stores them in a shared offset register file. This merging eliminates redundant computation across multiple worker threads while maintaining parallel execution capability, thereby reducing overall operation completion time without sacrificing productivity.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If dedicated hardware is provided for each thread to support multi-threading, then thread context management is improved, but the amount of silicon required increases

Engineering Contradiction:
Improvethread context managementVSAvoidsilicon area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by creating a shared offset register file that serves all worker threads simultaneously, rather than providing separate offset storage for each thread. The offset register file is a universal resource that can be accessed by any worker thread based on its identifier. This multi-functional approach maintains reliable thread context management (each worker can still access its specific offset) while significantly reducing the silicon area required compared to dedicated per-thread offset storage.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements local quality by providing each worker thread with direct access to its specific offset value in the shared offset register file through its unique thread identifier. While the storage structure is shared (reducing silicon area), each worker thread experiences localized, dedicated access to its own data location information, maintaining the reliability and efficiency of individual thread context management without requiring physically separate hardware for each thread.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12613732B2Initialisation of worker threads and associated operand registers
Publication Date: 2026.04.28 GRAPHCORE LTD
  • US12613732B2 patent drawing
  • US12613732B2 patent drawing
  • US12613732B2 patent drawing

AI summary

A processing device comprising: at least one execution unit configured to interleave execution of a plurality of worker threads, wherein each of the worker threads is configured to execute a same set of code to perform operations on a different set of data held in an input buffer of a memory of the processing device and output the results data to an output buffer. An instruction is executed so as to cause a plurality of operand registers, each of which is associated with one of the worker threads, to be populated with one or more variables enabling each worker to determine where in the input buffer is located its set of input data and where to store its results data.