Workload Scheduling for Under-Provisioned On-Chip Voltage Regulators
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Solution Overview
Problem
Existing multi-core and chip multi-processor systems face inefficiencies in power delivery due to over-provisioning of voltage regulators and power conditioning circuits, which are not optimized for average power consumption, leading to increased energy waste and reduced energy efficiency.
Innovation Solution
Implementing a reconfigurable on-chip power delivery network with under-provisioned on-chip voltage regulators (OCVRs) and a workload scheduling algorithm that clusters OCVR outputs to match average load current demands, using a switching fabric to dynamically adjust power delivery and minimize energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If over-provisioned voltage regulators and power conditioning circuits are used to support peak load current, then reliability of power delivery is improved, but energy efficiency deteriorates due to increased power consumption
Solution Approach 1:
The patent implements dynamic reconfiguration of the power delivery network using a switching fabric that can dynamically connect different voltage regulators to different core clusters based on real-time power demand. This allows the system to transition from a static over-provisioned configuration to a dynamic adaptive configuration that matches power delivery capacity to actual workload requirements, resolving the contradiction between reliability and energy efficiency.
Solution Approach 2:
The system changes the operational parameters of the power delivery network by adjusting which voltage regulators are active and how they are connected to cores through the switching fabric. This parameter adjustment allows the system to operate with under-provisioned regulators during low-demand periods while maintaining reliability during peak demand, thereby reducing overall power consumption without sacrificing reliability.
2Speed
If on-chip voltage regulators are integrated to reduce latency and improve DVFS response, then speed is improved, but device complexity increases due to additional on-chip circuits
Solution Approach 1:
The patent segments the power delivery network into multiple independent voltage regulator modules, each capable of serving specific core clusters. This segmentation allows for finer-grained control and reduced complexity per regulator while maintaining fast response times. The switching fabric is also segmented into controllable stages that can be independently managed, reducing overall device complexity while preserving speed advantages.
3Use of energy by moving object
If reconfigurable power delivery network is implemented to match average power demand, then energy efficiency is improved, but loss of time increases due to switching and reconfiguration overhead
Solution Approach 1:
The patent implements preliminary action by pre-configuring the switching fabric and voltage regulator connections based on predicted or historical workload patterns. The system proactively reconfigures the power delivery network before peak demand occurs, reducing the actual reconfiguration time during critical periods. This preliminary preparation allows the system to achieve energy efficiency benefits while minimizing time loss during operational reconfiguration.
4Loss of energy
If under-provisioned voltage regulators are used to reduce power consumption, then loss of energy is reduced, but reliability deteriorates due to insufficient power delivery capacity
Solution Approach 1:
The patent implements universality by designing the switching fabric to enable multiple voltage regulators to serve multiple core clusters in different configurations. This multi-functionality allows under-provisioned regulators to be dynamically shared across different core groups, ensuring that each regulator operates near its optimal capacity while maintaining sufficient total power delivery capacity for reliability. The same infrastructure serves multiple purposes depending on workload demands.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases energy efficiency by up to 44% by reducing power consumption and latency, while maintaining reliable dynamic voltage and frequency scaling, and minimizing power supply noise and I/O pin count.
Implementation Method 1
on-chip voltage regulators (OCVRs) and a workload scheduling algorithm that clusters OCVR outputs to match average load current demands
Data Source
AI summary
A real-time workload scheduling heuristic assigns tasks to the cores such that the total load current consumption of the cores is always less than the total current capability of the under-provisioned on-chip voltage regulators. In addition, the energy-efficient scheduling of the tasks on to the cores ensures that the reconfiguration of the power delivery network is minimized. The heuristic includes DVFS management based on the unique constraints of the under provisioned voltage regulators.