WPACT Command Mitigates Memory Package Resonance

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Solution Overview

Problem

Existing memory systems face issues with 'killer patterns' that cause worst-case margin scenarios due to repeating sequences of '1' or '0' being stored, leading to package resonance and inefficiencies, especially during idle to active transitions, where scrambling techniques are ineffective.

Innovation Solution

A Write Pattern Activate (WPACT) command is introduced to store predefined patterns, such as all zeros or all ones, directly to memory cells without transmitting them through the data bus, using a pattern register and control logic to manage and update content patterns dynamically, reducing the need for data transmission and mitigating power delivery issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If repeating sequences of '1' or '0' are stored to memory cells through the data bus, then data is written to memory, but package resonance occurs causing worst case margin scenarios

Engineering Contradiction:
Improvememory write reliabilityVSAvoidpackage resonance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The harmful repeating pattern data is extracted and prevented from being transmitted through the data bus. Instead, a WPACT command is sent that directly activates predefined patterns stored in pattern registers at the memory device, removing the problematic data transmission path while achieving the same memory write effect.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Pattern registers and control logic are introduced as intermediaries between the host and memory cells. The host sends a WPACT command to load predefined patterns into pattern registers, which then automatically write to memory cells without requiring data transmission through the data bus, thus eliminating package resonance while maintaining write functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If scrambling techniques are used to mitigate killer patterns, then some margin issues are reduced, but techniques are ineffective during idle to active transitions

Engineering Contradiction:
Improvemargin stabilityVSAvoideffectiveness across operational states
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

Predefined patterns are pre-loaded into pattern registers at the memory device before actual write operations. When a WPACT command is received, the pre-prepared patterns are immediately activated and written to memory cells, enabling rapid response during idle to active transitions without requiring data transmission or scrambling processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically switches between normal write operations and WPACT command operations based on the operational state. During idle to active transitions, the dynamic nature of the pattern register activation allows immediate pattern writing without the delays and limitations of scrambling techniques, adapting effectively to different operational conditions.

Inventive Principle:
Principle #15Dynamics

3Productivity

If predefined patterns are stored directly to memory cells using WPACT command, then data transmission is reduced, but queue space management becomes critical

Engineering Contradiction:
Improvewrite operation efficiencyVSAvoidqueue management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system discards the need to queue and transmit actual pattern data through the data bus by using WPACT commands that directly activate predefined patterns in pattern registers. This recovers queue space that would otherwise be consumed by transmitting repeating pattern data, while maintaining write operation efficiency through direct pattern activation.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentEP3423948B1Techniques to cause a content pattern to be stored to memory cells of a memory device
Publication Date: 2021.12.15 INTEL CORP
  • EP3423948B1 patent drawingFigure 1
  • EP3423948B1 patent drawingFigure 2
  • EP3423948B1 patent drawingFigure 3

AI summary

Examples include techniques to cause a content pattern to be stored to memory cells of a memory device. Example techniques include forwarding a content pattern to a memory device for storage to registers maintained at the memory device. A command is generated and forwarded to the memory device to cause the content pattern to be stored to at least a portion of memory cells for the memory device responsive to a write request to the memory device having a matching content pattern.