Wrap-Around Source/Drain Contacts for Backside Metal Interconnects
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Solution Overview
Problem
The challenge in semiconductor device manufacturing is to create high-performance, low-capacitance, and low-power integrated circuits with increased density, which requires efficient backside connections in three-dimensional transistor devices.
Innovation Solution
The solution involves backside reveal processing to form wrap-around contacts and interconnects on the non-device side of three-dimensional semiconductor devices, allowing for flexible connections and improved integration of N- and P-channel transistors in a CMOS integrated circuit, using techniques like dielectric material deposition, patterning, and conductive contact filling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional front-side contact formation is used, then manufacturing process is simple, but device density and integration capacity are limited
Solution Approach 1:
The patent transitions from conventional front-side contact formation to backside contact formation, utilizing the third dimension (vertical orientation) to increase device density. By forming contacts on the backside of the substrate and extending them through the substrate thickness, the invention enables higher integration capacity without increasing the planar footprint of the device.
Solution Approach 2:
The contact formation process is segmented into distinct stages: forming contacts on the backside surface, extending them through the substrate via etch holes, and creating separate interconnect regions. This segmentation allows for independent optimization of each contact region and enables complex three-dimensional transistor configurations with multiple N- and P-channel devices.
2Adaptability or versatility
If backside reveal processing is implemented, then flexible connections and improved integration are achieved, but manufacturing process complexity increases
Solution Approach 1:
The backside reveal processing is performed as a preliminary step before final contact formation. The substrate is thinned and backside surfaces are prepared in advance, allowing subsequent contact and interconnect formation to proceed more efficiently. This preliminary preparation enables the flexible three-dimensional connections while managing overall manufacturing complexity through staged processing.
3Loss of energy
If wrap-around contacts are formed, then low-capacitance and low-power devices are achieved, but manufacturing precision requirements increase
Solution Approach 1:
Dielectric materials and spacer structures serve as intermediaries to define and maintain precise contact dimensions and positions. These intermediary layers provide mechanical support and electrical isolation, enabling the formation of low-capacitance wrap-around contacts with controlled geometry. The intermediary structures facilitate accurate alignment during the etching and deposition processes.
Data Source
AI summary
An apparatus including a circuit structure including a first side including a device layer including a plurality of devices and an opposite second side; an electrically conductive contact coupled to one of the plurality of devices on the first side; and an electrically conductive interconnect disposed on the second side of the structure and coupled to the conductive contact. A method including forming a transistor device including a channel between a source and a drain and a gate electrode on the channel defining a first side of the device; forming an electrically conductive contact to one of the source and the drain from the first side; and forming an interconnect on a second side of the device, wherein the interconnect is coupled to the contact.