Wrap-around Contacts for Low Resistivity Nanosheet Devices
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Solution Overview
Problem
The increasing middle-of-line (MOL) contact resistance in advanced CMOS devices due to aggressive dimensional scaling, particularly in field-effect transistors (FETs) like nanosheet FETs and FinFETs, is challenging to address effectively, especially with faceted epitaxially grown source-drain structures where uniform dopant delivery is difficult using plasma-based techniques.
Innovation Solution
A method involving the deposition of a conformal metal layer containing dopant atoms, followed by annealing to form metal silicide or germano-silicide wrap-around contact layers, and the subsequent deposition of a barrier and contact metal layer to achieve low resistivity contacts with uniform dopant distribution across the source-drain interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If plasma-based doping techniques are used to deliver dopants to source-drain regions, then doping can be achieved, but uniform dopant delivery around epitaxially formed source-drain structures is difficult
Solution Approach 1:
The patent applies preliminary action by forming a conformal metal layer containing dopant atoms before the doping step. This metal layer is deposited uniformly across the faceted source-drain structures, ensuring that dopants are pre-positioned in a controlled manner. The subsequent annealing process then releases these dopants uniformly into the source-drain regions, achieving uniform doping without the complexity of plasma-based techniques.
Solution Approach 2:
The patent uses a conformal metal layer as an intermediary carrier for dopant atoms. Instead of directly applying plasma-based doping which struggles with uniformity on faceted structures, the dopants are first incorporated into the metal layer during deposition. This intermediary metal layer then serves as a controlled release mechanism, delivering dopants uniformly to the source-drain regions during annealing.
2Productivity
If dimensional scaling is aggressive to improve transistor performance, then transistor density and speed improve, but middle-of-line contact resistance increases
Solution Approach 1:
The patent addresses the contact resistance issue by transitioning from planar contacts to three-dimensional wrap-around contacts. The conformal metal layer wraps around the faceted source-drain structures, creating contact paths in multiple dimensions. This dimensional change increases the effective contact area and provides multiple parallel conduction paths, thereby reducing overall contact resistance despite aggressive scaling.
Solution Approach 2:
The patent applies local quality by creating wrap-around contacts that specifically target the source-drain interface regions. The conformal metal layer is deposited to wrap around the faceted structures, ensuring that dopants are delivered precisely to the critical interface regions between the contact and source-drain. This localized dopant delivery optimizes the contact properties where it is most needed, reducing contact resistance without affecting other device regions.
3Reliability
If conformal metallization processes are used to wrap around source-drain surfaces, then contact resistance is reduced, but uniform dopant delivery to faceted structures remains challenging
Solution Approach 1:
The patent changes the physical and chemical parameters of the doping process by using a conformal metal layer deposition followed by thermal annealing, instead of plasma-based doping. The metal layer deposition parameters (temperature, pressure, precursor flow rates) are controlled to ensure uniform dopant incorporation. The subsequent annealing parameters (temperature, time, atmosphere) are optimized to release dopants uniformly from the metal layer into the source-drain regions, achieving both low contact resistance and uniform dopant delivery.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in low source-drain contact resistance and uniform dopant delivery to silicide/source-drain interfacial regions, compatible with CMOS processing, thereby enhancing the performance of FETs.
Implementation Method 1
depositing a conformal metal layer containing dopant atoms on the structure
Implementation Method 2
annealing the structure, thereby forming metal silicide or metal germano-silicide wrap-around contact layers
Implementation Method 3
causing diffusion of the dopant atoms from the conformal metal layer into interface regions between the wrap-around contact layers and the faceted source-drain regions
Data Source
AI summary
Low resistivity, wrap-around contact structures are provided in nanosheet devices, vertical FETs, and FinFETs. Such contact structures are obtained by delivering dopants to source/drain regions using a highly conformal, doped metal layer. The conformal, doped metal layer may be formed by ALD or CVD using a titanium tetraiodide precursor. Dopants within the conformal, doped metal layer are delivered during the formation of wrap-around metal silicide or metal germano-silicide regions. Dopant segregation at silicide/silicon interfaces or germano-silicide/silicon interfaces reduces contact resistance in the wrap-around contact structures. A contact metal layer electrically communicates with the wrap-around contact structures.