Wrap-Around Titanium Contacts for Conformal 3D Transistor Coverage
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Solution Overview
Problem
Conventional metal deposition methods, such as sputtering, struggle with achieving conformal coverage on non-flat surfaces in 3D transistor fabrication, leading to incomplete metal-semiconductor junctions and increased resistance in integrated circuit devices.
Innovation Solution
A low-temperature chemical vapor deposition process using titanium tetrachloride and hydrogen to form a titanium layer with high purity and conformality, ensuring comprehensive coverage on complex transistor surfaces, including non-line of sight areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional sputtering methods are used for metal deposition, then the deposition process is simple and fast, but the metal coverage on non-flat surfaces is incomplete and junction resistance increases
Solution Approach 1:
The patent replaces the mechanical sputtering deposition method with a chemical vapor deposition (CVD) process. This substitution allows metal atoms to be delivered chemically through vapor phase reactions, enabling complete coverage of non-flat surfaces including sidewalls and corners that mechanical line-of-sight sputtering cannot reach, thereby achieving conformal coverage and reducing junction resistance
Solution Approach 2:
The patent changes the deposition parameters by using low temperature CVD conditions (below 400°C) with specific precursor gases (TMGa and TMAl). This parameter change enables the metal layer to conformally cover complex 3D surfaces without the line-of-sight limitations of sputtering, improving coverage completeness while maintaining low junction resistance
2Quantity of substance
If conventional high-temperature metal deposition is used, then deposition speed is fast, but surface erosion occurs and film purity decreases
Solution Approach 1:
The patent changes the temperature parameter to low temperature (below 400°C) CVD conditions, which prevents surface erosion and maintains film purity while still achieving adequate deposition rates through optimized chemical vapor phase reactions. This parameter change resolves the trade-off between deposition speed and surface integrity
Solution Approach 2:
The patent replaces high-temperature physical vapor deposition with low-temperature chemical vapor deposition. This substitution eliminates the thermal damage and surface erosion associated with high-temperature processes while maintaining efficient metal delivery through chemical reactions in the vapor phase, preserving both deposition rate and film purity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the metal-semiconductor contact area, reducing junction resistance and improving the performance of 3D transistor devices by maintaining minimal film thickness variation and preventing surface erosion during deposition.
Implementation Method 1
reacting titanium tetrachloride (TiCl4) and hydrogen (H2) to form a titanium (Ti) layer on the feature of the substrate
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3~4A
AI summary
Metal chemical vapor deposition approaches for fabricating wrap-around contacts, and semiconductor structures having wrap-around metal contacts, are described. In an example, an integrated circuit structure includes a semiconductor feature above a substrate. A dielectric layer is over the semiconductor feature, the dielectric layer having a trench exposing a portion of the semiconductor feature, the portion having a non-flat topography. A metallic contact material is directly on the portion of the semiconductor feature. The metallic contact material is conformal with the non-flat topography of the portion of the semiconductor feature. The metallic contact material has a total atomic composition including 95% or greater of a single metal species.