Wrap-Around Extrinsic Base HBT Structure for Lower Rb and Ccb
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Solution Overview
Problem
Current integration schemes for heterojunction bipolar transistors (HBTs) result in high collector-base capacitance (Ccb) and high base resistance (Rb), which limit device scaling and performance in terms of cut-off frequencies (fT/fMAX) and breakdown voltage (BVceo).
Innovation Solution
A heterojunction bipolar transistor with a wrap-around extrinsic base and an inverted 'T' shaped spacer is fabricated, featuring a polysilicon emitter and an epitaxially grown SiGe intrinsic base, where the extrinsic base wraps around the emitter and intrinsic base, allowing for increased silicide and ohmic contact formation, thereby reducing Rb and enhancing fMAX.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional integration schemes are used for HBT fabrication, then manufacturing process is simpler, but base resistance (Rb) increases and cut-off frequency (fT/fMAX) decreases
Solution Approach 1:
The extrinsic base is extended from a planar configuration into the third dimension by wrapping around the emitter region. This vertical integration allows the extrinsic base to contact the emitter from multiple directions (top and sidewalls), effectively reducing the current path length and contact resistance without increasing the planar footprint, thereby improving fT/fMAX while maintaining low Rb
2Productivity
If device scaling is pursued to improve fT/fMAX, then device dimensions are reduced, but collector-base capacitance (Ccb) and base resistance (Rb) increase
Solution Approach 1:
By transitioning from planar to vertical integration with the wrap-around extrinsic base, the design achieves further scaling in the vertical dimension while maintaining electrical performance. The vertical configuration reduces the horizontal spacing between regions, decreasing Ccb, while the multi-directional base contact maintains low Rb despite reduced device dimensions
Solution Approach 2:
The extrinsic base wraps around and partially overlaps the emitter region, creating a nested configuration where the base encompasses portions of the emitter from multiple directions. This nested geometry reduces the effective distance between base and collector while maintaining adequate separation to control Ccb, and provides multiple contact points to the emitter to reduce Rb
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to transistor with wrap-around extrinsic base and methods of manufacture. The structure includes: a substrate; a collector region within the substrate; an emitter region over the substrate and which comprises silicon based material; an intrinsic base; and an extrinsic base overlapping the emitter region and the intrinsic base; an extrinsic base overlapping the emitter region and the intrinsic base; and an inverted âTâ shaped spacer which separates the emitter region from the extrinsic base and the collector region from the emitter region.