Wrapper Module for Partial Reconfiguration Simulation in PLDs
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Solution Overview
Problem
Conventional hardware simulators lack the ability to simulate partial reconfiguration of programmable logic devices, as they cannot switch between different versions of code representing different logic instantiations while running, leading to interrupted simulations and ineffective temporal behavior modeling.
Innovation Solution
Incorporating a wrapper module into source files that provides a constant interface between fixed and reconfigurable regions, allowing for seamless communication and enabling the simulation of partial reconfiguration by changing designs at runtime or compile-time without requiring recompilation, thus maintaining continuous simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional hardware simulators are used to simulate programmable logic devices, then basic logic simulation can be performed, but the ability to simulate partial reconfiguration mid-simulation is lost, causing simulation interruption
Solution Approach 1:
The patent introduces a wrapper module as an intermediary component that sits between the fixed logic region and the reconfigurable logic region. This wrapper module provides a stable interface that remains unchanged during partial reconfiguration, allowing the simulator to maintain continuous operation while the reconfigurable region changes its logic functionality. The wrapper module absorbs the complexity of region coordination, enabling seamless transitions without simulation interruption.
Solution Approach 2:
The patent divides the programmable logic device into distinct segments: a fixed logic region that remains unchanged and a reconfigurable logic region that can be dynamically reconfigured. By segmenting the device this way, the simulator can independently manage each region, allowing reconfiguration of one segment without affecting or interrupting the simulation of the other segment.
2Adaptability or versatility
If different versions of code are switched during simulation to represent different logic instantiations, then partial reconfiguration can be simulated, but recompilation is required which interrupts simulation and reduces efficiency
Solution Approach 1:
The patent implements dynamic reconfiguration capability where the reconfigurable logic region can switch between different logic versions during simulation without requiring recompilation. The system uses runtime control signals to dynamically change the logic instantiation in the reconfigurable region, allowing the simulation to proceed continuously with updated logic behavior. This dynamic approach eliminates the need to pause simulation for recompilation, significantly improving simulation efficiency.
Solution Approach 2:
The patent prepares multiple logic versions in advance within the reconfigurable logic region's configuration memory or lookup tables. Before simulation begins, different logic instantiations are pre-loaded and ready for rapid switching. This preliminary preparation allows the simulator to switch between logic versions instantly during runtime by simply changing configuration data, without needing to interrupt simulation for recompilation or re-synthesis.
3Stability of the object's composition
If a constant interface is provided between fixed and reconfigurable regions, then communication stability is maintained during reconfiguration, but the complexity of managing the wrapper module increases
Solution Approach 1:
The wrapper module is designed with universal, standardized interface connections that can work with multiple different logic configurations in the reconfigurable region. By using universal interface protocols and connection methods, the wrapper module maintains stable communication regardless of which logic version is active. This universality reduces the need for custom interface management for each logic version, thereby reducing overall complexity while maintaining stability.
Data Source
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AI summary
Disclosed is a method of simulating partial reconfiguration of a programmable logic device (PLD). A wrapper module is incorporated into a logic description that may be implemented in a PLD. The wrapper module represents a first logic design. In response to receiving a parameter, the wrapper module changes to represent a second logic design. According to various embodiments, the logic description is a simulatable source file. The simulatable source file is a source file that is used by a simulation program to simulate partial reconfiguration of the logic design. The wrapper module of the simulatable source file receives a run-time parameter. In various embodiments, the logic description is a synthesizable source file. The synthesizable source file is a source file that is used by a synthesis tool to compile the source file into hardware. The wrapper module of the synthesizable source receives a compile-time parameter.