Write Assist Circuit for Low Voltage Memory Reliability
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Solution Overview
Problem
As IC devices and memories are miniaturized, reduced operating voltages pose challenges for reliable read and write operations, leading to concerns about weak write assist ability and reduced memory cell reliability.
Innovation Solution
A memory device with a write assist circuit configured in an array dual rail (ADR) configuration, where the output circuit operates in the VDDM power domain and the input circuit in the VDD power domain, generating a write assist voltage corresponding to VDDM to ensure reliable write operations at low voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If operating voltage is reduced to miniaturize IC devices, then device size is reduced, but write assist ability becomes weak and memory cell reliability decreases
Solution Approach 1:
The write assist circuit is divided into two separate power domains: the input circuit operates in the VDD power domain while the output circuit operates in the VDDM power domain. This segmentation allows each circuit portion to operate at its optimal voltage level, with the output circuit generating stronger write assist voltage in the VDDM domain to compensate for the reduced operating voltage, thereby resolving the contradiction between miniaturization and write assist ability.
2Volume of moving object
If operating voltage is reduced to miniaturize IC devices, then device size is reduced, but memory cell reliability decreases
Solution Approach 1:
By segmenting the write assist circuit into dual power domains (VDD and VDDM), the output circuit can generate write assist voltage at the higher VDDM level, providing sufficient voltage margin for reliable memory cell write operations even when the overall device operates at reduced voltage for miniaturization.
Solution Approach 2:
The patent applies local quality by assigning different power domain characteristics to different parts of the write assist circuit. The input circuit operates at VDD voltage while the output circuit operates at VDDM voltage, allowing the critical output stage to maintain high voltage quality for reliable memory cell operation despite the reduced overall operating voltage.
3Reliability
If dual power domain configuration is used to enhance write assist ability, then write assist voltage tracking is improved, but device complexity increases
Solution Approach 1:
The write assist circuit is segmented into input and output circuits operating in different power domains (VDD and VDDM respectively). This segmentation enables independent voltage control and tracking for each stage, improving write assist voltage tracking accuracy while keeping the overall architecture relatively simple through functional division.
Data Source
AI summary
A memory device includes a memory cell in a first power domain of a first power supply voltage, a bit line coupled to the memory cell, and a write assist circuit. The write assist circuit includes an input, an output electrically couplable to the bit line in a write operation of the memory cell, an input circuit electrically coupled to the input, and an output circuit electrically coupled between the input circuit and the output. The input circuit is in a second power domain of a second power supply voltage different from the first power supply voltage, and the output circuit is in the first power domain.