Write Assist SRAM via Collapsible Supply Voltage
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Solution Overview
Problem
The minimum voltage (Vmin) of SRAM write voltage cannot be scaled down due to increased threshold voltage variations and SRAM capacity requirements as device size decreases, limiting the reduction of SRAM core voltage and contributing to power consumption issues in semiconductor chips.
Innovation Solution
A write-assist memory system that includes a separable conductive line between bit lines, providing a collapsible SRAM supply voltage based on capacitive coupling of control signals, reducing the SRAM supply voltage during write operations to enhance write capability without introducing additional control signals or increasing layout area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If device size is reduced to increase SRAM capacity, then storage density is improved, but threshold voltage variations increase causing write failures
Solution Approach 1:
A write-assist unit is introduced as an intermediary component between the bit lines and the SRAM cell. This unit includes a separable conductive line that provides a collapsible SRAM supply voltage to assist the write operation, enabling reliable writing in scaled-down devices with higher threshold voltage variations
Solution Approach 2:
The SRAM supply voltage is dynamically changed during write operations. The collapsible SRAM supply voltage is reduced based on capacitive coupling of control signals during write operations, creating favorable voltage conditions to overcome increased threshold voltage variations in scaled devices
2Use of energy by moving object
If SRAM core voltage is reduced to lower power consumption, then energy efficiency is improved, but minimum write voltage cannot be scaled down due to threshold voltage variations
Solution Approach 1:
The write-assist unit applies local voltage modification only to the specific SRAM cell being written, while the rest of the memory array operates at normal voltage. The collapsible SRAM supply voltage is applied locally through the separable conductive line between the bit lines to the target cell during write operations
Solution Approach 2:
The write-assist unit acts as a mediator that enables low-voltage operation by providing assist voltage only when needed for write operations, allowing the memory to operate at lower core voltages while maintaining write reliability through localized voltage assistance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for a more aggressive reduction in SRAM supply voltage, improving write operations while maintaining reliability and scalability, and is cost-efficient by requiring only two additional transistors per SRAM column.
Implementation Method 1
provides a collapsible SRAM supply voltage to the column of SRAM cells based on a capacitive coupling of a control signal in the pair of bit lines
Data Source
AI summary
A write-assist memory includes a memory supply voltage and a column of SRAM cells that is controlled by a pair of bit lines, during a write operation. Additionally, the write-assist memory includes a write-assist unit that is coupled to the memory supply voltage and the column of SRAM cells and has a separable conductive line located between the pair of bit lines that provides a collapsible SRAM supply voltage to the column of SRAM cells based on a capacitive coupling of a control signal in the pair of bit lines, during the write operation. A method of operating a write-assist memory is also provided.