Write Bitline Driver Voltage Level Shifting Dual Voltage Domain
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Solution Overview
Problem
Conventional dual voltage memory systems are expensive and consume significant power due to the need for multiple dedicated voltage level shifters to convert global write bitline signals from a low voltage domain to a high voltage domain for each memory bank, which increases both dynamic and static power consumption.
Innovation Solution
A local write bitline driver with built-in voltage level shifting functionality is used to generate local write bitline signals in the high voltage domain based on global write bitline signals from the low voltage domain, integrating voltage level shifting without significant area or power addition, by employing a domino logic implementation with NFETs and PFETs to shift signals and gate them with a write enable signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple dedicated voltage level shifters are used to convert global write bitline signals from low voltage domain to high voltage domain for each memory bank, then signal conversion capability is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent merges the voltage level shifting function with the local write bitline driver circuit by integrating a voltage level shifter within the driver circuit itself. This eliminates the need for separate dedicated voltage level shifters for each memory bank, thereby reducing device complexity while maintaining the ability to convert signals from the low voltage domain to the high voltage domain.
Solution Approach 2:
The local write bitline driver circuit is designed to perform multiple functions: it generates local write bitline signals for memory banks, performs voltage level shifting from low voltage domain to high voltage domain, and gates signals with write enable. This multi-functional design eliminates the need for separate dedicated circuits for each function, reducing overall device complexity.
2Adaptability or versatility
If multiple dedicated voltage level shifters are used for each memory bank, then signal conversion capability is improved, but power consumption increases
Solution Approach 1:
By merging the voltage level shifting function into the local write bitline driver circuit, the patent eliminates multiple separate voltage level shifter circuits that would consume power. The integrated design performs signal conversion only when needed for local write operations, reducing overall power consumption compared to having dedicated shifters always powered for each memory bank.
Solution Approach 2:
Instead of providing full voltage level shifting capability for all memory banks through separate dedicated circuits, the patent uses a partial approach where the voltage level shifting is integrated only into the local write bitline driver circuits that actually need it for their operation, avoiding unnecessary power consumption from unused shifting circuits.
3Device complexity
If global write bitline drivers are placed in high voltage domain to avoid dedicated voltage level shifters, then device complexity is reduced, but power consumption increases significantly
Solution Approach 1:
The patent applies local quality by placing the write driver circuit in the low voltage domain where it consumes less power, while only the necessary voltage level shifting and gating functions are performed locally within that same circuit before the signal reaches the high voltage domain memory bank. This avoids the need for a high voltage domain global write bitline driver while maintaining low power consumption.
Data Source
AI summary
Systems and methods are directed to managing signals in a dual voltage domain comprising a high voltage domain and a low voltage domain. A write bitline driver circuit receives complementary global write bitline signals as input signals from a global write bitline driver in the low voltage domain, and a write enable signal as an input signal in the high voltage domain. The write bitline driver circuit generates complementary local write bitline signals as output signals in the high voltage domain for activating bitlines of a memory bank in the high voltage domain. The complementary local write bitline signals are based on the complementary global write bitline signals, voltage level shifted from the low voltage domain to the high voltage domain and gated by the write enable signal.