Temperature-Based Write Booster Flush Control for NAND Storage

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Solution Overview

Problem

Existing semiconductor memory devices face challenges in maintaining performance and extending their lifetime, particularly due to the repetitive write booster and flush operations that can degrade the nonvolatile memory cells.

Innovation Solution

Implementing a write booster buffer and normal storage configuration in semiconductor devices, where data is selectively written and flushed based on device temperature, with memory cells in the write booster buffer configured to store fewer bits than those in the normal storage, and disabling flush operations when the device temperature is within a reference range to maintain buffer capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If write booster operations are performed frequently to maintain high-speed performance, then productivity is improved, but the lifetime of nonvolatile memory cells deteriorates due to increased wear from repetitive flush operations

Engineering Contradiction:
Improvewrite speedVSAvoidmemory cell lifetime
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the operational parameters of the write booster buffer based on device temperature. When temperature exceeds a threshold, the controller disables automatic flush operations, changing the buffer management behavior from aggressive flushing to conservative retention, thereby reducing wear on memory cells while maintaining write performance

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If flush operations are performed frequently to maintain buffer capacity, then the write booster functionality is preserved, but memory cell wear increases reducing device lifetime

Engineering Contradiction:
Improvebuffer capacity maintenanceVSAvoiddevice lifetime
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements dynamic control of flush operations based on real-time temperature monitoring. The system transitions between different operational states (flush enabled/disabled) according to temperature conditions, making the buffer management adaptive rather than static, thus balancing buffer maintenance with wear reduction

Inventive Principle:
Principle #15Dynamics

3Productivity

If the write booster buffer is maintained at high capacity to handle large data writes, then productivity is improved, but the frequency of flush operations increases causing more wear

Engineering Contradiction:
Improvedata write capacityVSAvoidmemory cell endurance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the flush operation parameter (enabled/disabled state) based on temperature threshold conditions. When temperature is high, flush operations are disabled regardless of buffer capacity, allowing the buffer to maintain high capacity without the penalty of frequent flushing, thus protecting memory cells while preserving write capacity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the performance and extends the lifetime of the nonvolatile memory devices by reducing the frequency of flush operations and minimizing wear on memory cells, while maintaining high-speed operations when needed.

Implementation Method 1

a temperature sensor that periodically measures a device temperature of the storage device

Methodology Applied
Scientific EffectTemperature sensing: Thermistor

Data Source

PatentUS12487756B2Storage device, operation method of storage device, and operation method of host device
Publication Date: 2025.12.02 SAMSUNG ELECTRONICS CO LTD
  • US12487756B2 patent drawing
  • US12487756B2 patent drawing
  • US12487756B2 patent drawing

AI summary

Disclosed is an operation method of a storage device which includes a write booster buffer and normal storage. The operation method includes writing first write data received from a host device in the write booster buffer, and selectively performing a flush operation on write booster buffer, in which the first write data stored in the write booster buffer are flushed to the normal storage, based on a device temperature of the storage device. Memory cells included in the write booster buffer are configured to store “n” bits (n being a natural number), and memory cells included in the normal storage are configured to store “m” bits (m being a natural number more than n).