Write Cache Bypass for Data Chunk Acknowledgment

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Solution Overview

Problem

Existing data storage systems face inefficiencies in managing and optimizing the storage of data chunks, particularly in balancing reliability and performance during write operations, leading to suboptimal latency and duration in data processing.

Innovation Solution

A method and system that utilize a cache mechanism, specifically employing a solid-state drive (SSD) as a write cache, to store user data and journal entries, allowing for immediate acknowledgement of successful writes and reducing latency, while bypassing the cache for non-critical data types to optimize storage capacity and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all data chunks are stored to cache before acknowledgment, then write reliability is improved, but storage capacity is wasted and performance deteriorates

Engineering Contradiction:

Improvewrite reliabilityVSAvoidwrite operation performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by differentiating treatment based on data type: critical data (user data and journal entries) is stored to cache with acknowledgment, while non-critical data (metadata, erasure coding parameters) bypasses the cache. This selective approach optimizes both reliability for critical data and performance for overall write operations.

Inventive Principle:

Principle #3Local quality

2Quantity of substance

If data is stored directly to HDD without cache, then storage capacity is optimized, but write latency increases

Engineering Contradiction:

Improvestorage capacity efficiencyVSAvoidwrite latency

Core Design Contradiction:

Quantity of substanceVSLoss of time

Solution Approach 1:

The patent introduces an intermediary cache layer (SSD) between the write source and the HDD storage. This intermediary provides fast acknowledgment for critical data while maintaining the HDD as the primary storage destination, thus reducing write latency without compromising storage capacity efficiency.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Speed

If cache is used for all data types, then write acknowledgment speed is improved, but cache capacity is insufficient

Engineering Contradiction:

Improvewrite acknowledgment speedVSAvoidcache capacity

Core Design Contradiction:

SpeedVSQuantity of substance

Solution Approach 1:

The patent applies partial action by storing only critical data (user data and journal entries) to the cache rather than all data types. This selective caching ensures that the limited cache capacity is used efficiently for data requiring fast acknowledgment, while non-critical data bypasses the cache to avoid capacity exhaustion.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS10853237B2Write cache system and method for data chunk bypass and acknowledgment of write of data chunk

Publication Date: 2020.12.01 EMC IP HLDG CO LLC

AI summary

A method, computer program product, and computer system for receiving, at a first computing device, a first data chunk sent from a second computing device. It may be determined that the first data chunk includes a first type of data. The first data chunk may be stored to a cache operatively coupled to the first computing device based upon, at least in part, determining that the first data chunk includes the first type of data, wherein the cache may include a first storage device type. An acknowledgement of a successful write of the first data chunk to the second computing device may be sent based upon, at least in part, a successful storing of the first data chunk to the cache operatively coupled to the first computing device.