Write Cache Page Merge Deferral via Pointer Tracking

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Solution Overview

Problem

Conventional data storage systems incur significant CPU time and memory bandwidth costs due to the need for frequent page merges and data copying between cache pages, especially when handling writes smaller than the page size, which can lead to inefficient processor usage and memory allocation.

Innovation Solution

The proposed method delays data movement and page merges until necessary, using a new approach to track data changes that avoids copying between cache pages, allowing for arbitrary page sizes without excessive CPU usage and reducing the need for page allocation, thereby optimizing write-back caching operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If frequent page merges and data copying are performed to maintain cache consistency, then data integrity is improved, but CPU time and memory bandwidth usage increase significantly

Engineering Contradiction:
Improvedata integrityVSAvoidCPU time and memory bandwidth usage
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-establishing pointers to the same physical cache page in multiple cache page tables before writes occur. This allows the system to acknowledge writes quickly to multiple hosts without performing immediate data copying or page merges, thereby maintaining data integrity while reducing CPU time and memory bandwidth usage during write operations.

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If data is copied between cache pages to maintain consistency, then cache coherence is improved, but system performance deteriorates due to excessive data copying

Engineering Contradiction:
Improvecache coherenceVSAvoidsystem performance
Core Design Contradiction:
Stability of the object's compositionVSProductivity

Solution Approach 1:

The patent extracts the data copying operation from the write acknowledgment process. Instead of copying data between cache pages when acknowledging writes to multiple hosts, the system maintains coherence by updating pointers in cache page tables to reference the same physical page, thereby preserving cache coherence while eliminating excessive data copying and improving system performance.

Inventive Principle:
Principle #2Taking out (Extraction)

3Quantity of substance

If page merges are performed frequently to consolidate cache pages, then cache memory utilization is improved, but processor usage becomes inefficient

Engineering Contradiction:
Improvecache memory utilizationVSAvoidprocessor usage efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-configuring multiple cache page table entries to point to the same physical cache page before writes occur. This eliminates the need for frequent page merges to consolidate cache memory, as the system can efficiently manage multiple views of the same data without requiring processor-intensive merge operations, thereby improving both cache memory utilization and processor usage efficiency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9323671B1Managing enhanced write caching
Publication Date: 2016.04.26 EMC IP HLDG CO LLC
  • US9323671B1 patent drawing
  • US9323671B1 patent drawing
  • US9323671B1 patent drawing

AI summary

A method and system for use in managing enhanced write caching is disclosed. In at least one embodiment, the method and system comprises performing write-back caching operations using a write cache of a storage processor of a data storage system. A first cache page corresponding to a disk location is provided in the write cache. A host is allowed to write to a second cache page in the write cache corresponding to the same disk location. Both the first and second cache pages are maintained after acknowledging the write to the host.