Write Cache Data Placement Using Read Heat Separation
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Solution Overview
Problem
Conventional NAND Flash-based SSDs face challenges in reducing read latency due to the intrinsic properties of NAND Flash memory, where erase operations take longer than page program operations, leading to increased read latency as the number of bits stored per cell increases, and existing controllers struggle to manage data effectively across different page types.
Innovation Solution
A computer-implemented method that determines the read heat value of each logical page and assigns write requests to respective write queues based on this value, allowing for selective data placement in write cache architecture, which supports read heat data separation, thereby reducing overall processing delays and read latency across different types and generations of memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-bit-per-cell memory (TLC/QLC) is used to increase storage capacity, then storage density is improved, but read latency increases
Solution Approach 1:
The patent segments write requests into multiple write queues (first write queue, second write queue, etc.) based on read heat values. Each write queue corresponds to a specific page type in the NAND Flash memory. This segmentation allows the system to route data to appropriate memory locations with different latency characteristics, thereby managing the trade-off between storage capacity and read latency effectively.
Solution Approach 2:
The patent applies local quality by associating different page types (with different read latency properties) with different write queues. Pages of the same type are grouped together in page stripes, and each write queue is dedicated to a specific page type. This allows the system to optimize data placement locally based on read heat characteristics, improving overall system performance despite using multi-bit-per-cell memory.
2Loss of time
If read heat tracking and selective data placement is implemented, then read latency is reduced, but device complexity increases
Solution Approach 1:
The patent implements preliminary action by tracking read heat values in advance and using this information to pre-sort write requests into appropriate write queues before data is written to memory. This proactive approach allows the system to optimize data placement based on predicted access patterns, reducing read latency without requiring complex real-time decision-making during read operations.
Solution Approach 2:
The patent introduces dynamic elements by making write queue selection adaptable based on read heat values. The system dynamically adjusts which write queue a request is assigned to based on the calculated read heat, allowing flexible optimization of data placement. This dynamic approach enables the controller to adapt to changing access patterns while maintaining manageable complexity through rule-based queue selection.
Data Source
AI summary
A computer-implemented method, according to one approach, includes: determining a current read heat value of each logical page which corresponds to write requests that have accumulated in a destage buffer. Each of the write requests is assigned to a respective write queue based on the current read heat value of each logical page which corresponds to the write requests. Moreover, each of the write queues correspond to a different page stripe which includes physical pages, the physical pages included in each of the respective page stripes being of a same type. Other systems, methods, and computer program products are described in additional approaches.