Write Driver Circuit Intermediate Current Switching
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Solution Overview
Problem
Data storage devices face limitations in achieving high data recording densities due to issues with current switching times and adjacent track erasure, particularly with short symbol lengths leading to unreliable writes and longer symbol lengths causing adjacent track interference.
Innovation Solution
Implementing a write driver circuit that applies bi-directional write currents with an intermediate current value between rail currents for at least one channel clock period before symbol boundaries, reducing current switching time and minimizing adjacent track erasure by tuning the length of intermediate current application based on head configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If short symbol lengths are used to increase data recording density, then bits per inch (BPI) increases, but current switching time becomes insufficient leading to unreliable writes
Solution Approach 1:
The patent applies preliminary action by transitioning the write current to an intermediate value before the symbol boundary occurs. This preparatory current adjustment reduces the switching time required when the current must reverse direction, allowing short symbol lengths to be written reliably without compromising write accuracy.
Solution Approach 2:
The patent changes the current parameter by introducing an intermediate current value between the positive and negative rail currents. This parameter modification allows for smoother current transitions and reduces the time required for current switching, enabling reliable writing of short symbols at high densities.
2Reliability
If longer symbol lengths are used to ensure reliable writes, then write reliability improves, but adjacent track erasure increases
Solution Approach 1:
By transitioning the write current to an intermediate value before the symbol boundary, the patent reduces the duration and intensity of the magnetic field applied to adjacent tracks. This preliminary current reduction minimizes adjacent track erasure while maintaining sufficient write reliability through the controlled intermediate current state.
Solution Approach 2:
The introduction of an intermediate current value modifies the magnetic field strength parameter during symbol transitions. This parameter change reduces the harmful magnetic field exposure to adjacent tracks, thereby minimizing adjacent track erasure while maintaining adequate field strength for reliable writing on the target track.
3Productivity
If high data clock rates are implemented to increase productivity, then bits per inch increases, but current switching time becomes insufficient
Solution Approach 1:
The patent applies preliminary action by initiating the current transition to the intermediate value before the symbol boundary occurs. This advance current adjustment ensures that the current is already in the process of switching when the symbol boundary is reached, effectively reducing the loss of time associated with current switching at high data clock rates.
Solution Approach 2:
By changing the current parameter to an intermediate value, the patent reduces the magnitude of current switching required. This parameter modification decreases the time constant associated with inductive current changes, allowing high data clock rates to be sustained without sacrificing switching time margins.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for higher data clock rates and increased data recording densities by reducing rise times and adjacent track erasure, enabling higher bits per inch (BPI) and tracks per inch (TPI) values.
Implementation Method 1
a write element that is controllably positionable adjacent the data recording medium to write data to a recording layer thereof as a magnetic pattern
Data Source
AI summary
Method and apparatus for enhancing write current switching efficiencies during data write operations in a data storage device. In some embodiments, write data are described in the form a sequence of symbols of nT length where T is a channel clock rate and n is an integer over a selected range. Bi-directional write currents are applied to a write element to record the sequence of symbols to a storage medium. The write currents are switched between a first rail current and a second rail current for alternating symbols. The write currents are further transitioned to an intermediate current value for at least one channel clock period immediately preceding a next occurrence of a symbol boundary between an adjacent pair of symbols in the sequence.