Write-Only Memory Module for Software Self Test Verification
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Solution Overview
Problem
Existing software verification and validation methods are inadequate for continuous monitoring of software applications, particularly in devices used for safety or security operations, as they can lead to device corruption, security breaches, and false negative determinations due to the generation of erroneous data and intermixing with real data.
Innovation Solution
A computing apparatus with a processor coupled to a main memory and a write-only memory module, where output data from an application under test is directed to the write-only memory module for storage in a protected cache, and only transferred to main memory after successful verification and validation, preventing malicious writes and ensuring data protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuous verification and validation is implemented by restarting self-tests periodically, then software reliability is improved, but device usability deteriorates due to extended periods where the device is unusable
Solution Approach 1:
The patent segments the memory system into three distinct parts: a protected cache memory for storing output data during verification, a sandbox memory for isolated application execution, and main memory. This segmentation allows continuous verification to proceed without blocking device operations, as the verification process operates on isolated memory segments rather than requiring complete system suspension.
Solution Approach 2:
The patent introduces a protected cache memory as an intermediary buffer between the application's output data and main memory. This intermediary allows data to be staged and verified without interrupting the application's execution or the device's usability, resolving the contradiction between continuous verification and device availability.
2Measurement precision
If artificial data is generated for test sequences, then measurement precision is improved, but data integrity deteriorates due to intermixing with real data and difficulty in removal
Solution Approach 1:
The patent extracts test data generation and verification into a separate, isolated sandbox memory environment. By taking out the test data generation process from the main system and confining it to a sandbox, the patent prevents artificial test data from intermixing with real application data, thereby maintaining data integrity while still enabling precise measurement and verification.
Solution Approach 2:
The patent applies local quality by creating a specialized sandbox memory region with distinct properties from main memory. This sandbox has specific access controls and isolation characteristics that allow artificial test data to coexist with real data in the broader system without contamination, as the sandbox's local properties prevent data intermixing.
3Adaptability or versatility
If applications are allowed to write to protected portions of memory, then adaptability is improved, but security deteriorates due to potential corruption and malicious attacks
Solution Approach 1:
The patent implements preliminary action by establishing protected cache memory and sandbox environments before applications execute. These protective structures are pre-configured with appropriate access controls and isolation mechanisms, allowing applications to operate flexibly within defined boundaries while preventing any potential corruption of protected memory regions before it can occur.
Solution Approach 2:
The patent provides beforehand cushioning by introducing protected cache memory as a buffer zone between applications and critical system memory. This cushioning layer absorbs and contains any potentially harmful writes from applications, preventing them from reaching and corrupting protected portions of memory while still allowing applications adequate flexibility for their operations.
Data Source
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AI summary
A computing apparatus configured to perform software verification and validation includes a processor coupled to a main memory, and a write only memory module, wherein the processor is configured to execute an application under test. The application under test is configured to write output data to the main memory. The processor directs the output data to the write only memory module and transfers the output data to the main memory when the execution of the application under test is successful, or erases the output data from the write only memory module when the execution of the application under test is unsuccessful.