Write Precompensation Tuning Noise Mitigation
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Solution Overview
Problem
Write-to-write bit error rate fluctuations in shingled magnetic recording (SMR) devices lead to inaccurate write precompensation tuning, causing increased bit error rates due to remnant noise near track boundaries.
Innovation Solution
A predetermined pattern is written at different radial offsets from a target data track to identify the optimal radial offset that minimizes bit error rate fluctuations, using a track clean-up phase to mitigate noise and select the appropriate WPC register for improved write transition timing shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If write precompensation tuning is performed without mitigating remnant noise, then the tuning process can be completed, but write-to-write bit error rate fluctuations increase and accuracy decreases
Solution Approach 1:
The patent applies preliminary action by performing a track clean-up phase before the actual write precompensation tuning. A predetermined pattern is written at different radial offsets from the target data track to mitigate remnant noise from previous writes. This preparation step ensures that the subsequent tuning process measures bit error rates accurately without contamination from adjacent track interference, thereby resolving the contradiction between tuning accuracy and bit error rate stability.
2Ease of operation
If data is written at the center of the target data track, then write precompensation can be tested, but remnant noise from adjacent tracks contaminates the measurement
Solution Approach 1:
The patent uses an intermediary approach by introducing a predetermined pattern written at specific radial offsets as a mediator between the target data track and the interfering adjacent tracks. This intermediary pattern acts as a buffer that mitigates remnant noise from adjacent tracks before it can contaminate the measurement at the target track center. The intermediary pattern allows the system to isolate and measure bit error rates accurately without the confounding effect of adjacent track interference.
3Reliability
If multiple radial offsets are tested to find optimal noise mitigation, then bit error rate fluctuations are reduced, but the tuning process time increases
Solution Approach 1:
The patent applies partial action by testing a limited set of predetermined radial offsets rather than exhaustively testing all possible offsets. The system writes the predetermined pattern at specific predetermined radial offsets (such as +10%, -10%, 0% from track center) which provides sufficient noise mitigation for accurate tuning without requiring exhaustive search. This partial action approach reduces the time required compared to testing all possible offsets while still achieving the goal of reducing bit error rate fluctuations to acceptable levels.
Data Source
AI summary
The disclosed technology provides techniques for mitigating write-to-write bit error rate fluctuations that decrease accuracy of write precompensation (WPC) tuning. According to one implementation, such write-to-write bit error rate fluctuations are mitigated if a predetermined pattern is written at a particular radial offset from a target data track prior to testing a WPC register in association with the target data track. Selection of the particular radial offset can be performed according to an iterative offset track clean-up disclosed herein.