Write Protection Circuit for Memory in Display Apparatus
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Solution Overview
Problem
In display apparatuses, data stored in memory cannot be modified without causing errors, but interference signals on the communication bus can inadvertently rewrite software codes in the memory, leading to abnormal displays.
Innovation Solution
A write protection circuit is implemented, comprising a data writing triggering terminal, a write protection controlling circuit, and an interference signal absorbing circuit, which detects and absorbs interference signals, ensuring the memory is not rewritten by providing a second level signal opposite in polarity to the first level signal, thereby preventing data modification during normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the write protection pin is connected with the communication bus to enable data writing during normal operation, then the memory can be updated with new data, but interference signals on the communication bus may pull up the write protection pin signal, causing unintended rewriting of data
Solution Approach 1:
The patent introduces a write protection control circuit as an intermediary between the communication bus and the memory's write protection pin. This circuit includes a control terminal that receives write protection control signals, and a write protection output terminal that generates the actual write protection signal for the memory. The intermediary circuit filters and validates signals before reaching the memory, preventing interference signals from causing unintended rewriting while still allowing legitimate write operations.
Solution Approach 2:
The write protection control circuit implements feedback mechanisms by monitoring the state of the communication bus and the write protection control signals, then adjusting the output write protection signal accordingly. The circuit uses feedback to distinguish between legitimate write requests and interference signals, ensuring that data writing only occurs when properly authorized while maintaining protection against spurious signals.
2Reliability
If the write protection pin is restricted to prevent data modification, then data integrity is maintained, but legitimate data updates cannot be performed when needed
Solution Approach 1:
The write protection control circuit dynamically adjusts the write protection state based on control signals received from the communication bus. The circuit transitions between protected and writable states according to valid write protection control signals, enabling flexible control of data writing capability while maintaining protection during normal operation. This dynamic behavior allows the system to adapt between security and update needs.
Solution Approach 2:
The circuit performs preliminary validation of write requests by checking for proper write protection control signals before enabling data writing. The write protection control circuit prepares and validates the write protection signal in advance, ensuring that only authorized write operations can proceed. This preliminary action prevents unauthorized writing while allowing legitimate updates when proper control signals are provided.
Data Source
AI summary
A write protection circuit for memory and a display apparatus are provided. The write protection circuit includes an interference signal absorbing circuit connected with a data writing triggering terminal to absorb a first level signal when the receiving of the first level signal by the data writing triggering terminal is detected.