Write Recovery Time Control Circuit for Semiconductor Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In synchronous semiconductor memory devices, the current methods for controlling write recovery time (tWR) result in unnecessary current consumption and noise due to prolonged clock toggle operations during automatic precharge, especially at high frequencies.
Innovation Solution
A circuit and method that delay the activation of the tWR control signal until the last data segment is written, using a combination of first and second delay units to minimize the time for clock toggle operations, thereby reducing unnecessary power consumption and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the tWR control signal is activated from the write command input time, then the write recovery time is guaranteed, but the clock toggle operation time is unnecessarily long causing high current consumption and noise
Solution Approach 1:
The patent applies preliminary action by delaying the tWR control signal activation until the last data segment is written, rather than activating it at the write command input time. This is achieved through a delay circuit that waits for the write operation to complete before starting the tWR countdown, thereby eliminating unnecessary early clock toggling while still guaranteeing the required write recovery time.
2Reliability
If the tWR control signal is activated from the write command input time, then the write recovery time is guaranteed, but the clock toggle operation generates excessive noise
Solution Approach 1:
The patent delays the activation of the tWR control signal until the last data segment is written by using a delay circuit that monitors the write operation completion. This preliminary waiting action prevents unnecessary early clock toggling, thereby reducing noise generation while maintaining the required write recovery time guarantee.
3Measurement precision
If the counting operation is performed for a long time, then the precharge timing is accurately controlled, but the clock toggle operation consumes excessive power
Solution Approach 1:
The patent uses a delay circuit to preliminarily wait until the last data segment is written before activating the tWR control signal and starting the counting operation. This ensures the countdown begins at the optimal time, maintaining accurate precharge timing control while minimizing the duration of clock toggling and reducing power consumption.
Data Source
AI summary
A circuit and a method for controlling a write recovery time (tWR) in a semiconductor memory device are disclosed. The method according to one embodiment of the present invention includes receiving an automatic precharge write command, and generating a tWR control signal, which is delayed from a point in time when the automatic precharge write command is received to a point in time when a last data segment is written in the semiconductor memory device. Therefore, power consumption and clock noise may be reduced since an operation of a counter in the circuit for controlling the tWR may be minimized after a point in time when the last data is written.