Memory Read Voltage Compensation Across Write-Read Temperatures

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Solution Overview

Problem

Cross-temperature effects in memory devices cause bit flip errors and reduced data retention due to shifts in threshold voltage levels, leading to increased error rates and latency in read operations, which existing compensation methods fail to adequately address.

Innovation Solution

The memory device stores the write temperature along with the data and uses this information to adjust read voltage offsets based on the cross-temperature difference, reducing the need for excessive error correction operations and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If temperature compensation is not applied, then device complexity is reduced, but error rate increases due to threshold voltage shifts

Engineering Contradiction:
Improveerror rateVSAvoidcompensation mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by storing the write temperature alongside data during the write operation. This temperature information is preserved and later used during read operations to determine appropriate read voltage offsets, eliminating the need for complex real-time temperature sensing and compensation circuits.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by storing a copy of the write temperature value in the memory device. This temperature copy is then referenced during read operations to select appropriate read voltage offsets, avoiding the need for complex temperature sensing hardware and simplifying the overall device architecture.

Inventive Principle:
Principle #26Copying

2Reliability

If traditional error correction operations are used, then error rates are reduced, but latency increases due to excessive correction cycles

Engineering Contradiction:
Improveerror correctionVSAvoidread latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-determining the appropriate read voltage offset based on stored temperature information before the actual read operation. This allows the system to use optimized read voltages from the start, reducing or eliminating the need for multiple error correction cycles and thereby reducing read latency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using stored temperature information to dynamically select read voltage offsets. This feedback mechanism allows the system to adapt read operations to temperature conditions without requiring complex real-time sensing, reducing error rates while maintaining low latency through intelligent voltage selection.

Inventive Principle:
Principle #23Feedback

3Stability of the object's composition

If read voltage offsets are not adjusted for temperature, then device complexity is minimized, but data retention deteriorates under varying temperature conditions

Engineering Contradiction:
Improvedata retentionVSAvoidtemperature compensation
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by capturing and storing the write temperature at the time of data programming. This temperature information is preserved with the data and later used to select appropriate read voltage offsets, ensuring stable data retrieval across varying temperature conditions without requiring complex real-time temperature compensation circuits.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250342867A1Cross-temperature compensation in a memory sub-system
Publication Date: 2025.11.06 MICRON TECHNOLOGY INC
  • US20250342867A1 patent drawing
  • US20250342867A1 patent drawing
  • US20250342867A1 patent drawing

AI summary

Control logic in a memory device receives, from a requestor, a request to read data from the memory array, the request comprising an indication of a segment of the memory array where the data is stored and performs, using previously configured read operation parameters, a first read operation to read the data and a write temperature associated with the data from the memory array. The control logic determines whether the previously configured read operation parameters satisfy a temperature criterion and responsive to determining that the previously configured read operation parameters do not satisfy the temperature criterion, configures the memory device with updated read operation parameters, and performs, using the updated read operation parameters, a second read operation to read the data from the memory array.