Write Tracking Mechanism for Memory Data Eye Stability

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Solution Overview

Problem

High-speed memory systems, such as GDDR5 DRAM, face reliability and performance issues due to thermal changes causing data eye drift, which complicates precise timing and communication between the DRAM controller and memory systems.

Innovation Solution

A write tracking mechanism employing monitoring and sampling logic, command logic, filtering logic, and restoration logic to track and adjust data eye movements across changing temperatures by issuing write training commands and adjusting phase interpolator values to maintain data eye stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory speed is increased to improve performance, then productivity is improved, but timing precision deteriorates due to narrowed data eye and thermal drift

Engineering Contradiction:
Improvememory speedVSAvoidtiming precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the memory controller continuously monitors data eye position and width through sampling, compares it against reference values, and dynamically adjusts write timing and phase interpolator settings to compensate for thermal drift and maintain timing precision at high speeds

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adapts to changing thermal conditions by continuously tracking data eye movements and adjusting timing parameters in real-time, transforming the static timing setup into a dynamic system that self-corrects for thermal variations

Inventive Principle:
Principle #15Dynamics

2Productivity

If memory speed is increased to improve bandwidth, then productivity is improved, but reliability deteriorates due to data eye drift under thermal variations

Engineering Contradiction:
ImprovebandwidthVSAvoiddata eye stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The memory controller employs continuous feedback monitoring of data eye position during operation, detecting shifts caused by thermal variations and automatically compensating through timing adjustments to maintain reliable data sampling windows

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs preliminary write training sequences before normal operation to establish baseline timing parameters, and continuously performs micro-adjustments during operation to preemptively correct for anticipated thermal drift

Inventive Principle:
Principle #10Preliminary action

3Reliability

If write tracking mechanism is implemented to correct data eye drift, then reliability is improved, but device complexity increases due to additional monitoring and adjustment logic

Engineering Contradiction:
Improvedata eye stabilityVSAvoidcontrol mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory controller integrates multiple functions into unified logic blocks: the same sampling circuitry used for data recovery is also used for eye monitoring, and the timing adjustment mechanism serves both initial training and continuous compensation functions, reducing overall complexity despite enhanced capabilities

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10853216B2Mechanism for facilitating write tracking for following data eye movements across changing thermal conditions in memory systems
Publication Date: 2020.12.01 INTEL CORP
  • US10853216B2 patent drawing
  • US10853216B2 patent drawing
  • US10853216B2 patent drawing

AI summary

A mechanism is described for facilitating write tracking for following data eye movements across changing thermal conditions in memory systems according to one embodiment of the invention. A method of embodiments of the invention includes monitoring movements of a valid data eye associated with a memory device of a plurality of memory devices of a memory system at a computing system. The monitoring may include initiating write commands during one or more refresh periods associated with the valid data eye. The method may include determining drifting in the movement of the data eye, and correcting the drifting based on adjusting one or more existing phase interpolator values associated with the movements of the data eye.