X-Propagation Failure Analysis in Formal Verification

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Solution Overview

Problem

In electronic design verification, X-bugs (unknown or wildcard values) are often concealed, leading to hidden bugs that are difficult to detect, especially in low power designs, and current methods are slow and costly, requiring additional iterations and failing to accurately identify unique X sources.

Innovation Solution

A computer-implemented method that generates a symbolic constant to identify and modify X sources, using additional circuitry components like multiplexers to maintain a singular X source active non-deterministically, enabling faster verification and debug of X propagation failures by providing a path to target nodes and fetching symbolic constant values from counter-examples.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Gate Level Simulation is used to detect X-bugs, then X-bugs can be uncovered, but the verification process becomes too slow for modern System-on-a-chip designs

Engineering Contradiction:
ImproveX-bug detection capabilityVSAvoidverification speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the verification process by introducing a formal verification phase that operates separately from traditional gate-level simulation. This formal verification uses symbolic constants and targeted analysis to handle X-propagation issues independently, allowing the main simulation to proceed faster while still ensuring X-bug detection through the specialized formal analysis component.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If formal verification with symbolic constants is used, then unique X sources can be identified accurately, but the device complexity increases due to additional circuitry components

Engineering Contradiction:
ImproveX source identification accuracyVSAvoidverification environment complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces symbolic constants as intermediary elements that mediate between the complex circuitry and the verification process. These symbolic constants act as placeholders that simplify the representation of X sources, allowing unique identification without requiring direct modification of the underlying complex circuit structure. The symbolic constants serve as an abstract layer that manages complexity while maintaining identification accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multiple X sources are analyzed simultaneously, then comprehensive coverage is achieved, but the analysis time increases significantly

Engineering Contradiction:
Improveverification coverageVSAvoidanalysis time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by using symbolic constants to pre-identify and categorize potential X sources before conducting full analysis. This preliminary classification allows the verification process to focus on specific target nodes with known X source characteristics, reducing the overall analysis time while maintaining comprehensive coverage through systematic progression through different target nodes.

Inventive Principle:
Principle #10Preliminary action

4Productivity

If X-optimism is applied to conceal X-bugs, then fewer unknown values are propagated, but hidden X-bugs remain undetected

Engineering Contradiction:
Improvesimulation efficiencyVSAvoidbug detection capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent converts the harmful effect of X-optimism (hiding X-bugs) into a benefit by using symbolic constants to deliberately track and identify X sources that would otherwise be concealed. The symbolic constants transform the hidden X-propagation paths into visible, analyzable entities, allowing the verification process to benefit from efficient simulation while simultaneously detecting bugs that X-optimism would normally hide.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS10031990B1System, method, and computer program product for analyzing X-propagation failures in formal verification
Publication Date: 2018.07.24 CADENCE DESIGN SYST INC
  • US10031990B1 patent drawing
  • US10031990B1 patent drawing
  • US10031990B1 patent drawing

AI summary

The present disclosure relates to a computer-implemented method for electronic design verification. The method may include receiving, using a processor, an electronic design at a verification environment and generating a symbolic constant for use with the verification environment. The method may further include identifying a plurality of X sources associated with the verification environment and modifying the plurality of X sources based upon, at least in part, the symbolic constant. The method may also include running a first target node and if the first target node is proven, run at least one additional target node until all target nodes are proven.