Lossless User-Level Tracing on x86 via Scratch Space

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Solution Overview

Problem

Existing methods for tracing software systems are often 'lossful' when multiple threads execute an instrumented program, as not all threads encounter probes, leading to incomplete data collection due to serialized execution and context changes required in x86 architecture.

Innovation Solution

A method involving a scratch space to store original instructions and jump instructions, allowing threads to execute original instructions without single-stepping, using a trap handler to manage probes and generate jump instructions, enabling lossless tracing with reduced context switches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If the original instruction is replaced with a trap instruction and single-stepping is used to execute the original instruction, then complete tracing information is obtained, but three context changes are required which reduces productivity

Engineering Contradiction:
Improvetracing information completenessVSAvoidexecution efficiency
Core Design Contradiction:
Loss of informationVSProductivity

Solution Approach 1:

The patent segments the execution process by creating a shadow copy of the instruction stream in shadow memory. The original instruction stream is separated from the tracing mechanism, allowing threads to execute original instructions directly while tracing occurs in parallel through the shadow copy, eliminating the need for context switches.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a copy of the instruction stream in shadow memory that mirrors the original instruction stream. This shadow copy is used for tracing purposes while the original instructions continue to execute normally, allowing lossless tracing without interrupting the original execution flow.

Inventive Principle:
Principle #26Copying

2Loss of information

If trap instructions are used to instrument the program, then tracing data is collected at system calls, but in multi-threaded environments not all threads encounter probes leading to lossful tracing

Engineering Contradiction:
Improvetracing information completenessVSAvoidinstrumentation complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent merges the tracing mechanism with the normal execution flow by using shadow memory that mirrors the original instruction stream. Both the original execution and tracing operate simultaneously on the same instruction stream without requiring separate probe insertion points, ensuring all threads are traced uniformly.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shadow memory mechanism serves multiple functions: it acts as both a trace buffer and an execution stream. The same shadow instruction stream is used for both tracing purposes and actual execution, eliminating the need for separate instrumentation code paths.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of information

If all threads are suspended while one thread single-steps the original instruction, then lossless tracing is achieved, but execution is serialized reducing productivity

Engineering Contradiction:
Improvetracing information completenessVSAvoidmulti-threaded execution efficiency
Core Design Contradiction:
Loss of informationVSProductivity

Solution Approach 1:

The patent enables continuous execution of all threads simultaneously by using shadow memory for tracing. Instead of suspending threads to single-step instructions, the shadow instruction stream continues to execute and be traced in parallel with the original thread execution, maintaining continuous useful action without interruption.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7530055B1Mechanism for lossless user-level tracing on an x86 architecture
Publication Date: 2009.05.05 ORACLE AMERICAN INC
  • US7530055B1 patent drawing
  • US7530055B1 patent drawing
  • US7530055B1 patent drawing

AI summary

A method for tracing an instrumented program on a processor having an x86 architecture, including triggering a probe in the instrumented program, obtaining an original instruction associated with the probe, loading the original instruction into a scratch space, loading a jump instruction for the x86 architecture into the scratch space wherein the jump instruction includes a next program counter value, executing the original instruction in the scratch space using a thread, and executing the jump instruction in the scratch space using the thread.