xDSL FEC Parameter Selection Under Interleaver and Codeword Constraints
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Solution Overview
Problem
Conventional methods for determining Forward Error Correction (FEC) parameters in DMT-based xDSL systems face challenges in optimizing performance under system-imposed constraints such as maximum interleaver memory, depth, codeword size, and error correction requirements, often relying on exhaustive searches which are inefficient.
Innovation Solution
A method for computing FEC parameters using a computational engine in xDSL modems, which takes into account constraints like maximum interleaver memory, depth, codeword size, and error correction capabilities, optimizing bit allocation and FEC parameters to achieve optimal performance without exhaustive searches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional exhaustive search methods are used to determine FEC parameters, then all system constraints can be satisfied, but computational complexity and processing time increase significantly
Solution Approach 1:
The patent transforms the discrete optimization problem into a continuous parameter optimization problem by expressing FEC parameters (R, N, D) as continuous variables. This allows the use of efficient continuous optimization algorithms instead of exhaustive discrete search, significantly reducing computational complexity while still satisfying all system constraints through the mathematical relationships established in the patent.
Solution Approach 2:
The patent replaces the mechanical exhaustive search approach with a mathematical optimization model using Lagrange multipliers. This substitution transforms the problem from a brute-force computational search to an analytical solution approach, reducing processing time and computational resources while maintaining constraint satisfaction.
2Reliability
If larger FEC codeword sizes and deeper interleaver depths are used, then error correction capability improves, but memory requirements and processing delay increase
Solution Approach 1:
The patent makes the FEC parameters (R, N, D) dynamic and adaptive rather than fixed. The optimization model adjusts these parameters continuously based on the specific channel conditions, error correction requirements, and system constraints, allowing the system to use the minimum necessary memory and processing delay to achieve the required error correction capability for each operating condition.
Solution Approach 2:
The patent expresses the relationship between error correction capability and memory requirements through mathematical equations, allowing dynamic adjustment of parameters R, N, and D to optimize the trade-off between error correction performance and memory consumption based on actual system needs.
3Reliability
If more check bytes are added to FEC codewords, then error correction capability improves, but data rate decreases due to increased overhead
Solution Approach 1:
The patent formulates the trade-off between check bytes (R) and data rate as an optimization problem. The mathematical model allows dynamic adjustment of R to achieve the minimum necessary error correction capability while maximizing the data rate by minimizing overhead, adapting to different channel conditions and error rates.
Solution Approach 2:
The patent applies different FEC parameter configurations (different values of R, N, D) to different operating conditions and channel states. Rather than using a fixed high-overhead configuration for all conditions, the system locally optimizes parameters based on actual error rates and channel quality, achieving adequate error correction with minimal overhead in good conditions and increased overhead only when necessary.
Data Source
AI summary
The present invention provides procedures for computing Forward Error Correction (FEC) parameters given a set of constraints on maximum interleaver memory, maximum interleaver depth, maximum codeword size, maximum number of check bytes, maximum number of FEC codewords per Discrete Multi-Tone (DMT) symbol, and minimum number of DMT symbols that the FEC must correct, as well as any constraints imposed by the interleaver. These procedures are implemented on a computational engine in a modem, enabling it to achieve optimal performance in all cases. In addition these procedures can be applied as part of any bit loading algorithm to determine the optimal FEC parameters, taking into account the Signal-to-Noise Ratio (SNR) profile, the FEC coding gain, the constraints of the framer, and any application specific constraints.