Xen Hypervisor Memory Page Security via Independent Permission Table

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Solution Overview

Problem

Existing virtualization technologies, such as Xen, lack a practical method for implementing page-level memory security without interfering with the existing memory model, leaving legacy applications vulnerable to attacks like code injection and privilege escalation.

Innovation Solution

A data processing method is introduced that creates an independent table of memory page access permissions, allowing the security logic to register as a memory event interface with the Xen hypervisor, enabling it to determine and enforce more restrictive permissions for memory pages, thereby preventing unauthorized access and attacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Xen hypervisor memory page framework (p2m) is used to manage memory page type values, then memory paging and swapping functions are enabled, but page-level security permissions cannot be enforced

Engineering Contradiction:
Improvememory securityVSAvoidmemory permission control
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments memory permission control into two independent layers: the Xen p2m framework handles memory paging and swapping operations, while the new independent permission table (ipt) handles security permissions. This segmentation allows each layer to function independently without interfering with the other, resolving the contradiction between enabling memory management functions and enforcing security permissions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary security logic component that sits between the Xen hypervisor and the memory management system. This intermediary registers as a memory event interface with the hypervisor and uses hypercalls to interact with the p2m framework, allowing security permissions to be enforced without directly modifying or interfering with the existing Xen memory model.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If independent memory page permission table is created, then restrictive security permissions can be enforced, but complexity of the memory management system increases

Engineering Contradiction:
Improvesecurity enforcementVSAvoidmemory management structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By segmenting permission management into a separate independent permission table rather than integrating it into the existing p2m structure, the patent adds security functionality without complicating the core Xen memory management framework. The separation allows the permission table to be managed independently by security logic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The security logic autonomously manages the independent permission table and enforces security policies without requiring modifications to Xen's core memory management code. The system serves its own security needs through self-contained permission checking and enforcement mechanisms.

Inventive Principle:
Principle #25Self-service

3Reliability

If security logic registers as memory event interface with Xen hypervisor, then page-level security monitoring is enabled, but overhead of hypercall interface is introduced

Engineering Contradiction:
Improvesecurity monitoringVSAvoidhypercall overhead
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements partial monitoring by having security logic register for specific memory events that are relevant to security (such as page faults on executable pages) rather than monitoring all memory events. This selective approach enables security monitoring while minimizing the overhead of event registration and hypercall processing.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9747172B2Selective access to executable memory
Publication Date: 2017.08.29 CISCO TECHNOLOGY INC
  • US9747172B2 patent drawing
  • US9747172B2 patent drawing
  • US9747172B2 patent drawing

AI summary

In an embodiment, a data processing method comprises: in a computer executing a supervisor program, the supervisor program establishing different memory access permissions comprising any combination of read, write, and execute permissions for one or more different regions of memory of a first domain, receiving a request from a process to execute a particular memory page of the regions of memory, the particular memory page comprising a memory access permission set to read-writeable or read-only, throwing an execute fault for the particular memory page, performing one or more responsive actions to restore execution access or content of the particular memory page, and after performing the one or more responsive actions, setting the memory access permission to execute only.