X-masking registers for failing scan bit identification
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Solution Overview
Problem
Current methods for identifying failing scan bits in compression environments are inefficient, particularly when multiple scan bits are affected, as they require additional hardware and retesting, and are not applicable to all compression designs.
Innovation Solution
A hardware approach that employs a register to continuously capture scan output values, allowing for real-time identification of failing scan bits by freezing internal shift operations and using X-masking to select scan chains, which reduces hardware requirements and is applicable to a wider range of compression designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If higher Hamming distance compactors are used to identify failing scan bits, then measurement precision is improved, but device complexity increases and test compaction ratio decreases
Solution Approach 1:
The patent segments the failing scan bit identification process into two phases: (1) initial failure detection using a simple compactor with Hamming distance 3, and (2) precise failing bit identification using the stored scan output values from the additional register. This segmentation allows the system to use a simple compactor for detection while achieving precise identification through the stored data, avoiding the need for complex high Hamming distance compactors.
Solution Approach 2:
The patent performs preliminary action by continuously storing scan output values in an additional register during normal test operation. This pre-stored data is later used for precise failing scan bit identification when a failure is detected, eliminating the need to re-test or use complex compactors for identification.
2Loss of time
If slice shift mode is used to identify failing scan bits in real-time, then loss of time is reduced, but device complexity increases due to additional flip-flops and control logic
Solution Approach 1:
The patent performs preliminary action by continuously storing scan output values in an additional register during normal test operation. This pre-stored data is later used for precise failing scan bit identification when a failure is detected, eliminating the need to re-test or use complex compactors for identification.
Solution Approach 2:
The patent creates a copy of the scan output values by storing them in an additional register. This copy allows the system to analyze and identify failing scan bits without affecting the normal test operation or requiring complex slice shift control logic, as the stored copy can be freely accessed and re-examined.
3Measurement precision
If bypass approach with uncompressed mode is used, then measurement precision is improved, but loss of time increases due to retesting requirements
Solution Approach 1:
The patent performs preliminary action by continuously storing scan output values in an additional register during normal test operation. This pre-stored data is later used for precise failing scan bit identification when a failure is detected, eliminating the need to re-test or use complex compactors for identification.
Data Source
AI summary
X-masking registers are added in front of a compactor in test data compression environment to remove unknown values. The X-masking registers block out some chains due to unknown values and select other chains to feed the compactor. This X-masking capability is used to select one scan cell to observe at a time after a failure is observed at the compactor output.