Neural Network XNOR-Popcount Compute for Flexible GPU Workloads

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Solution Overview

Problem

Current graphics processing units (GPUs) face challenges in efficiently processing diverse operations due to their fixed function computational units and limited parallel processing capabilities, particularly in handling graphics and machine-learning tasks.

Innovation Solution

Implementing a general-purpose graphics processing unit (GPGPU) with a parallel processing architecture that includes a scheduler and processing cluster array to efficiently distribute workloads across multiple processing clusters, supporting both graphics and general-purpose computations, and integrating it with host processors via high-speed interconnects like PCIe or NVLink.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If fixed function computational units are used in GPUs, then processing speed for specific graphics operations is improved, but adaptability to handle diverse operations including machine-learning tasks deteriorates

Engineering Contradiction:
Improveprocessing speedVSAvoidadaptability
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The patent implements a unified processing cluster architecture where the same computational units can execute both traditional graphics operations and machine-learning workloads. The processing clusters are designed with flexible instruction decoding and data path configurations that allow them to adapt to different operation types without requiring separate dedicated hardware for each function type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If more processing clusters are added to increase parallel processing capability, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improveparallel processing capabilityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The GPU architecture is divided into multiple identical or similar processing clusters that can be replicated and scaled. Each processing cluster is a self-contained unit with its own computational resources, allowing the system to increase parallel processing capability by simply adding more clusters rather than making each cluster more complex. This modular segmentation enables scalable productivity improvement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements processing clusters with slightly excess computational resources and flexible configuration capabilities that allow them to handle a variety of workloads. Rather than optimizing each cluster for a single function, the clusters are designed with redundant or multi-purpose capabilities that enable them to efficiently handle different operation types, reducing the need for additional specialized hardware.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20260050438A1Compute optimizations for neural networks
Publication Date: 2026.02.19 INTEL CORP
  • US20260050438A1 patent drawing
  • US20260050438A1 patent drawing
  • US20260050438A1 patent drawing

AI summary

One embodiment provides for a compute apparatus comprising a decode unit to decode a single instruction into a decoded instruction that specifies multiple operands including a multi-bit input value and a one-bit weight associated with a neural network, as well as an arithmetic logic unit including a multiplier, an adder, and an accumulator register. To execute the decoded instruction, the multiplier is to perform a fused operation including an exclusive not OR (XNOR) operation and a population count operation. The adder is configured to add the intermediate product to a value stored in the accumulator register and update the value stored in the accumulator register.