Secure Data Storage via XOR Masking Shift Registers
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Solution Overview
Problem
Existing secure data storage methods face challenges in preventing side channel leakage, particularly in resource-constrained environments like smart cards, where masking techniques increase storage requirements significantly.
Innovation Solution
A method involving XOR combination of data shares with random number generator outputs for masking during storage, reducing storage needs by using shift registers and additional random number generators to minimize exposure, suitable for serial access patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If masking techniques are used to prevent side channel leakage, then security against power analysis attacks is improved, but storage requirements increase substantially
Solution Approach 1:
The invention extracts the masking function from dedicated storage elements and implements it using shift registers that naturally support serial access patterns. By taking out the masking requirement from the storage architecture and implementing it through sequential processing, the patent reduces storage requirements while maintaining security against side channel attacks.
Solution Approach 2:
The patent changes the parameter of data access from parallel to serial, allowing the use of shift registers instead of larger masked storage arrays. This parameter change enables the same security function to be achieved with reduced storage resources by processing data sequentially rather than requiring simultaneous masked storage of all data elements.
2Reliability
If threshold implementation is used to mask data, then protection against side channel attacks is improved, but the area for combinational logic increases
Solution Approach 1:
The invention uses periodic clocked operations in shift registers to achieve masking functionality. Instead of requiring complex combinational logic for continuous masking, the patent employs periodic clocked shifts that naturally provide the required security properties with minimal logic area, reducing the combinational logic requirements while maintaining protection against side channel attacks.
3Reliability
If conventional protected registers are used for storage, then security against fault attacks is improved, but the cost per secret bit stored increases
Solution Approach 1:
The patent employs simple, inexpensive shift register elements that are clocked periodically rather than using expensive conventional protected registers. These simple storage elements are used in a sequential manner with periodic masking operations, achieving the required security at a much lower cost per secret bit while maintaining protection against both side channel and fault attacks.
Data Source
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AI summary
The disclosure relates to secure data storage and retrieval, in particular to methods and circuits for securely storing data to reduce the possibility of leakage via side channel attacks. Embodiments disclosed include a method of storing a value comprising a series of words, the method comprising: i) combining in a series of XOR operations a word of a first portion of the value, a word of a second portion of the value and an output word of a first random number generator to provide a first combined word; ii) storing the first combined word in a shift register; and iii) repeating steps i) and ii) for each successive word of the first and second portions of the value.