Encryption-Decryption Circuit Using XOR Shift Registers
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Solution Overview
Problem
Conventional encryption and decryption techniques, such as the RSA public key encryption algorithm, require significant memory and processing power, making them unsuitable for smaller devices like cell phones and MP3 players equipped with 8-bit or 16-bit microcontrollers.
Innovation Solution
A simple encryption-decryption circuit using an N-bit shift register, exclusive-OR gate arrays, and a unique N-bit keyword for performing binary mathematics-based encryption and decryption operations, which reduces memory and processing requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional encryption algorithms (RSA) are used, then security and encryption capability are improved, but memory requirements and processing power requirements increase significantly
Solution Approach 1:
The patent changes the fundamental parameters of the encryption approach by using a stream cipher with XOR operations and shift registers instead of public key cryptography. This transforms the encryption mechanism to require minimal memory (only for storing the key and intermediate states) while maintaining security through the complexity of the key schedule and XOR-based encryption process.
Solution Approach 2:
The patent replaces the complex mathematical computations of RSA (exponential mathematics with large binary numbers) with simple bitwise XOR operations and shift register operations. This substitution of computational mechanics dramatically reduces both memory requirements and processing power needs while preserving encryption functionality.
2Reliability
If conventional encryption algorithms (RSA) are used, then encryption capability is improved, but processing throughput requirements increase significantly
Solution Approach 1:
The patent changes the computational parameters from heavy exponential mathematics to lightweight bitwise operations. The XOR-based stream cipher requires only simple logic gate operations that can be executed rapidly on 8-bit and 16-bit microcontrollers, dramatically improving processing throughput while maintaining encryption capability.
Solution Approach 2:
The patent substitutes complex mathematical computation mechanics with simple digital logic operations (XOR gates and shift registers). This replacement enables the encryption process to run efficiently on resource-constrained devices with limited processing throughput, making it suitable for mobile and embedded systems.
3Productivity
If simple encryption circuits are used, then memory and processing requirements are reduced, but encryption security may be compromised
Solution Approach 1:
The patent performs preliminary actions by generating a pseudorandom key stream through the shift register and XOR operations before the actual encryption takes place. This pre-computed key stream, derived from a secret key, provides the security foundation that allows simple XOR-based encryption to achieve strong security properties without requiring complex algorithms.
Solution Approach 2:
The patent introduces an intermediary element - the pseudorandom key stream generated by the shift register - that mediates between the simple XOR operation and the security requirement. This intermediary key stream transforms the simple XOR cipher into a secure stream cipher, maintaining both simplicity and security.
Data Source
AI summary
An encryption-decryption circuit for encrypting and decrypting data. The encryption-decryption circuit comprises: 1) an N-bit shift register for storing and shifting an N bit keyword; 2) a first exclusive-OR gate array for receiving M bits from the N-bit shift register and generating a one-bit exclusive-OR result that is shifted into an input of the N-bit shift register; and 3) a second exclusive-OR gate array comprising K exclusive-OR gates, each of the K exclusive-OR gates receiving one of K bits from the N-bit shift register and one of K data bits from a received K-bit data word and generating therefrom an exclusive-OR result. The K exclusive-OR gates thereby produce one of: i) a K-bit encrypted data word and ii) a K-bit unencrypted data word.