XOR Triangular Delay Mixing for Low-Jitter Digital Phase Control

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Solution Overview

Problem

Traditional phase compensation methods in digital input/output circuits, such as serial delay chains, introduce switching jitter due to complex circuits and timing errors, which are not effectively addressed by existing designs.

Innovation Solution

A simplified XOR-based triangular control signal is generated using a linear counter and XOR circuit, which eliminates the need for shift register circuits and reduces jitter by providing a continuous, glitch-free delay code update for parallel delay chains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional shift register circuits are used for triangular control, then phase compensation can be achieved, but device complexity increases and timing errors are introduced

Engineering Contradiction:
Improvephase compensation accuracyVSAvoidlogic control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the essential function of triangular control from complex shift register circuits and state machines, implementing it through a simplified counter and XOR gate combination. This removes unnecessary complexity while preserving the phase compensation function.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the control parameter generation method from complex sequential logic to a simple arithmetic approach using a counter and XOR operation. This parameter transformation eliminates timing errors associated with complex logic while maintaining the required triangular control waveform.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If serial delay chains are used for phase compensation, then phase locking can be achieved, but switching jitter is introduced

Engineering Contradiction:
Improvephase locking capabilityVSAvoidswitching jitter
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the delay chain into parallel paths with independent control, allowing fine delay mixing without the sequential switching problems of serial chains. This segmentation eliminates the root cause of switching jitter while maintaining phase locking capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary triangular control to the fine delay mixer before switching occurs, ensuring smooth transitions and eliminating jitter. The triangular waveform pre-conditioning of the control signal prevents abrupt switching that causes jitter in traditional designs.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If parallel delay chains with simultaneous coarse and fine code switching are used, then fine delay mixing can be achieved, but jitter is introduced

Engineering Contradiction:
Improvefine delay mixing precisionVSAvoidswitching jitter
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent implements dynamic control of the fine delay mixer through a triangular waveform generated by XOR operations. This dynamic control allows continuous adjustment of the fine delay parameter, enabling precise mixing while avoiding simultaneous switching of coarse and fine codes that causes jitter.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9455726B1XOR (exclusive or) based triangular mixing for digital phase control
Publication Date: 2016.09.27 INTEL CORP
  • US9455726B1 patent drawing
  • US9455726B1 patent drawing
  • US9455726B1 patent drawing

AI summary

Phase compensation in an I/O (input/output) circuit includes a triangular control contour with a simplified generation circuit. A linear control circuit can generate a digital N-bit linear count, and route the least significant M bits [(M−1):0] for linear control for fine delay mixing of a phase compensation loop and the most significant (N−M) bits [(N−1):M] for linear control for coarse control of a delay chain for the phase compensation loop. Prior to decoding the least significant M bits for fine delay mixing, the control circuit performs a bitwise XOR (exclusive OR) of bit M with each of bits [(M−1):0] to generate M linear control bits as the linear control for fine delay mixing. The M linear control bits generate a linear control count having a triangular contour, where the linear control count continuously, repeatedly counts from 0 to (2M−1) to 0.