XOR3PP Instruction for Accelerating Eight-Way Parallel Keccak Execution
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Solution Overview
Problem
Existing processor architectures face challenges in efficiently executing the compute-intensive Keccak operations required for post-quantum cryptography algorithms, particularly in accelerating eight-way parallel Keccak execution.
Innovation Solution
The introduction of new instructions, such as the XOR3PP instruction, which utilizes AVX512 registers to accelerate complex bit manipulations and byte reordering in the Keccak round function, specifically targeting the θ-step of the Keccak permutation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional processor architectures are used to execute Keccak operations, then the implementation is straightforward with standard instructions, but the execution speed is insufficient for compute-intensive post-quantum cryptography algorithms
Solution Approach 1:
The Keccak round function is segmented into distinct operational phases (theta step, rho step, pi step, chi step, iota step), with the theta step further broken down into column parity computation and row update operations. This segmentation allows each phase to be optimized independently using appropriate SIMD instructions, thereby increasing overall execution speed and throughput for post-quantum cryptography algorithms
Solution Approach 2:
The patent transitions from scalar processing to vector processing by utilizing AVX512 registers that can hold 8x more data than traditional 64-bit registers. By organizing the Keccak state as an 8-way parallel structure where each lane processes one quarter-row simultaneously, the implementation achieves 8x throughput improvement while maintaining the same instruction footprint, effectively adding a parallelism dimension to the execution model
2Productivity
If eight-way parallel Keccak execution is implemented using AVX512 instructions, then the throughput of cryptography algorithms is significantly improved, but the instruction complexity and implementation difficulty increase
Solution Approach 1:
The patent employs a unified AVX512 instruction set that handles multiple Keccak operations within single instructions. For example, the theta step implementation uses column parity computation instructions that simultaneously process all 8 parallel lanes, and row update instructions that perform both XOR and rotation operations in parallel. This multi-functionality reduces the total instruction count while achieving 8x throughput, thereby managing instruction set complexity despite the parallel execution model
Solution Approach 2:
The patent pre-organizes the Keccak state into an 8-way parallel structure where data is arranged in AVX512-friendly layouts before processing. Column parity values are pre-computed and stored in registers, and rotation amounts are pre-calculated based on the round number. This preliminary preparation eliminates the need for complex runtime computations and simplifies the main execution loop, making the high-throughput implementation more manageable
Data Source
AI summary
A method comprises fetching, by fetch circuitry, an encoded XOR3P instruction comprising at least one opcode, a first source identifier to identify a first register, a second source identifier to identify a second register, a third source identifier to identifier a third register, and a fourth source identifier to identify a fourth operand, wherein the first register is to store a first value, the second register is to store a second value, and the third register is to store a third value, decoding, by decode circuitry, the encoded XOR3PP instruction to generate a decoded XOR3PP instruction; and executing, by execution circuitry, the decoded XOR3PP instruction to determine a first rotational value and a second rotational value, perform a rotate operation on at least a portion of the first value based on the first rotational value to generate a rotated third value, perform an XOR operation on at least a portion of the first value, at least a portion of the second value, and the rotated third value to generate an XOR result, perform a rotate operation on the XOR result based on the second rotational value to generate a rotated XOR; and store the rotated XOR result.