XR Memory Management for Deep Sleep Cache Stability

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Solution Overview

Problem

Mobile extended reality (XR) gaming devices face frequent exits from deep sleep states due to integrated connectivity activities, leading to increased power consumption and performance degradation due to system cache flushing and rebuilding policies.

Innovation Solution

A method for memory management that detects entry into a deep sleep state, monitors a hysteresis counter to compute a statistical threshold, and adjusts memory management and frequency scaling when the threshold exceeds a configuration value, implementing a live cache and memory management framework to reduce cache flush overhead and prolong battery life.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the mobile XR gaming device enters a deep sleep state to conserve battery power, then power consumption is reduced, but connectivity activities cause frequent exits from deep sleep state leading to increased power consumption

Engineering Contradiction:
Improvepower consumptionVSAvoiddeep sleep state stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system dynamically adjusts memory management policies and frequency scaling based on the hysteresis counter threshold to optimize the balance between power consumption and deep sleep state stability. When the hysteresis counter exceeds the threshold, the system modifies cache flushing behavior and frequency scaling to reduce wake-up events, thereby maintaining deeper sleep states longer and reducing overall power consumption while preserving system reliability.

Inventive Principle:
Principle #15Dynamics

2Reliability

If system cache flushing and rebuilding policies are implemented upon exiting deep sleep state, then system reliability is maintained, but game performance is degraded due to frequent cache operations

Engineering Contradiction:
Improvesystem cache integrityVSAvoidgame performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary cache management actions before exiting deep sleep state by monitoring the hysteresis counter. When the counter exceeds the threshold, the system pre-adjusts memory management policies and frequency scaling to minimize cache flush operations upon wake-up, thereby maintaining cache integrity while reducing performance degradation from frequent cache rebuilding during gaming activities.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes operational parameters (memory management policies and frequency scaling) based on the hysteresis counter threshold to optimize the balance between cache integrity and game performance. By dynamically adjusting these parameters, the system reduces the frequency and impact of cache flushing operations, thereby maintaining system reliability while minimizing performance degradation during gaming.

Inventive Principle:
Principle #35Parameter changes

3Speed

If increased cache memory resources are allocated to support integrated connectivity solutions, then connectivity performance is improved, but power consumption increases due to cache flushing and rebuilding activities

Engineering Contradiction:
Improveconnectivity performanceVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts memory management policies and frequency scaling based on the hysteresis counter threshold to optimize the balance between connectivity performance and power consumption. When the hysteresis counter exceeds the threshold, the system modifies cache flushing behavior to reduce the frequency of cache operations, thereby maintaining connectivity performance while significantly reducing the power consumption associated with frequent cache flushing and rebuilding activities.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12182012B2Smart extended reality data of usage (XR-DOU) framework for competitive power solution scheme
Publication Date: 2024.12.31 QUALCOMM INC
  • US12182012B2 patent drawing
  • US12182012B2 patent drawing
  • US12182012B2 patent drawing

AI summary

A method for memory management is described. The method includes detecting entry of a mobile device into a deep sleep state. The method also includes monitoring a hysteresis counter of entry into the deep sleep state relative to a time period of the mobile device in the deep sleep state to compute a hysteresis statistical threshold. The method further includes comparing the hysteresis statistical threshold to a threshold configuration value. The method also includes adjusting memory management of the mobile device and/or frequency scaling when the hysteresis statistical threshold is greater than the threshold configuration value.