Multi-chip Interconnection via XSPI and AXI Bus Encoding

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Current chip interconnection methods are complex and costly, failing to meet the high-efficiency and safety requirements of complex and varied systems such as automotive electronics.

Innovation Solution

A multi-chip interconnection system utilizing an XSPI master terminal with an AXI slave interface and an XSPI slave terminal with an AXI master interface, connected via XSPI and AXI buses, enabling efficient data transmission and feedback through encoding and decoding processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If current chip interconnection methods are used, then basic interconnection functionality is achieved, but system complexity increases and development costs increase

Engineering Contradiction:

Improveinterconnection safetyVSAvoidinterconnection complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The interconnection system is segmented into multiple independent channels including data transmission channel, feedback channel, status channel, and control channel. Each channel operates independently with dedicated protocols, allowing complex interconnection requirements to be divided into manageable segments that reduce overall system complexity while maintaining high reliability through channel isolation.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Protocol conversion terminals are introduced as intermediary devices between different chip interconnection protocols. These terminals perform protocol translation and adaptation, enabling heterogeneous chips to communicate without requiring complex direct integration, thereby reducing system complexity while ensuring safe and reliable interconnection.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If current chip interconnection methods are used, then basic data transmission is achieved, but transmission efficiency is insufficient for complex systems

Engineering Contradiction:

Improvedata transmission efficiencyVSAvoidsystem adaptability

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The interconnection system employs dynamic protocol selection and adaptive channel allocation mechanisms. The protocol conversion terminals can dynamically adjust transmission parameters and select appropriate protocols based on real-time system requirements, enabling high transmission efficiency for specific applications while maintaining adaptability to various system configurations.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The protocol conversion terminals are designed with multi-functional capabilities to handle multiple protocols and transmission modes. This universality allows the same terminal architecture to serve diverse interconnection requirements, maintaining system adaptability while achieving high transmission efficiency through optimized protocol handling.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Ease of manufacture

If simple interconnection solutions are used, then development costs are reduced, but interconnection safety and reliability are compromised

Engineering Contradiction:

Improvedevelopment costVSAvoidinterconnection safety

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The system uses standardized protocol conversion terminal designs that can be replicated across multiple interconnection points. By copying proven terminal architectures with built-in safety mechanisms, the system achieves high reliability without requiring custom complex designs for each interconnection, thereby controlling development costs while ensuring safety.

Inventive Principle:

Principle #26Copying

4Speed

If high-efficient interconnection is implemented, then data transmission speed improves, but system complexity increases

Engineering Contradiction:

Improvedata transmission speedVSAvoidinterconnection structure

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The system replaces complex mechanical or hardware-based high-speed interconnection structures with protocol-based software/firmware solutions in the protocol conversion terminals. This substitution achieves high data transmission speeds through optimized data handling while avoiding the structural complexity of dedicated high-speed physical interconnection architectures.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12339797B2Multi-chip interconnection system and method thereof

Publication Date: 2025.06.24 BEIJING SEMIDRIVE TECHNOLOGY LTD

AI summary

A multi-chip interconnection system includes a plurality of chips. A chip of the plurality of chips includes an extend serial peripheral interface (XSPI) master terminal, a data transmission terminal, an XSPI slave terminal, and a data reception terminal. The XSPI master terminal includes an advanced extensible interface (AXI) slave interface. The data transmission terminal accesses the AXI slave interface via an AXI bus. The XSPI slave terminal includes an AXI master interface. The data reception terminal accesses the AXI master interface via the AXI bus. An XSPI master terminal of a chip is connected to an XSPI slave terminal of another chip via an XSPI bus. The XSPI master terminal of the chip performs encoding on AXI information of the data transmission terminal of the chip received via the AXI bus and transmits encoded AXI information to the XSPI slave terminal of the another chip via the XSPI bus.