XY TCAM to Value TCAM Conversion via Translation Circuits
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Solution Overview
Problem
Conventional ternary content addressable memory (TCAM) systems face challenges in performing single cycle update and search operations efficiently, with XY TCAM offering space savings but requiring a two-cycle update, while value TCAM provides single cycle updates at the cost of increased chip space.
Innovation Solution
An integrated circuit TCAM system utilizing an array of XY TCAM cells with translation circuits and a memory controller to perform single cycle update and search operations, where shared bit lines and external data signals enable single cycle operations by modifying inputs and outputs through logic manipulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If XY TCAM is used to save chip space, then area is reduced, but update operation requires two cycles instead of one
Solution Approach 1:
The update operation is segmented into two phases: first updating the X cell, then updating the Y cell. This segmentation allows the system to maintain space efficiency while achieving functional equivalence to single-cycle updates through coordinated multi-phase operations.
Solution Approach 2:
The update operation uses periodic action by implementing a two-cycle update sequence where the X cell is updated in the first cycle and the Y cell is updated in the second cycle. This periodic approach maintains the space-saving XY TCAM structure while achieving the functional goal of updates through time-multiplexed operations.
2Productivity
If value TCAM is used to achieve single cycle updates, then update speed is improved, but chip space is increased
Solution Approach 1:
The patent introduces a time dimension to resolve the space-speed tradeoff. By using two cycles for updates in the XY TCAM structure, the system achieves update functionality equivalent to value TCAM without requiring the additional bit lines that would consume extra chip space. The time-multiplexed approach adds a temporal dimension to the update operation.
Solution Approach 2:
The XY TCAM structure uses X and Y cells that are essentially copies of each other, sharing common bit lines. This copying approach allows the system to achieve update functionality through coordinated updates of the two cells across two cycles, maintaining space efficiency while achieving the functional goals of value TCAM.
3Area of stationary object
If XY TCAM cells share common bit lines, then space usage is optimized, but search and update operations require two cycles
Solution Approach 1:
The X cell and Y cell share common bit lines, merging the read paths of both cells into a single shared infrastructure. This merging optimizes space usage by eliminating duplicate bit lines while requiring coordinated two-cycle operations to update both cells, as the shared bit lines must be used sequentially for each cell update.
Data Source
AI summary
Approaches for an integrated circuit ternary content addressable memory (TCAM) are provided. A system includes an array of XY TCAM cells and respective translation circuits connected to respective pairs of the XY TCAM cells. The system also includes a memory controller structured to provide control signals to the respective translation circuits. The memory controller and respective translation circuits are structured to control the array of XY TCAM cells to perform single cycle update and single cycle search operations.