Y-Star Coupled ESD Protection Circuits for Multi-Voltage Semiconductor ICs

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Solution Overview

Problem

The increasing number of power and ground voltage separations in large-scale semiconductor integrated circuits leads to a significant increase in the number of electrostatic discharge protection elements required, occupying a substantial portion of the semiconductor chip space.

Innovation Solution

The semiconductor integrated circuit employs a Y-star coupling configuration for electrostatic discharge protection circuits instead of the traditional delta coupling, reducing the number of electrostatic discharge protection circuits and elements by sharing a common midpoint for power and ground voltage protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of power voltage separations and ground voltage separations is increased to protect various internal circuits with different voltage levels, then the protection coverage is improved, but the number of electrostatic discharge protection circuits and elements increases significantly

Engineering Contradiction:
Improveprotection coverageVSAvoidnumber of protection circuits
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple electrostatic discharge protection circuits into a single integrated protection circuit that can handle multiple voltage levels. The protection circuit includes a plurality of electrostatic discharge protection elements connected in parallel between the power voltage terminal and ground terminal, with each element having different breakdown voltages corresponding to different internal circuit voltage levels. This consolidation reduces the total number of protection circuits while maintaining comprehensive protection coverage.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The protection circuit is designed with multi-functionality to protect multiple internal circuits operating at different voltage levels simultaneously. By configuring electrostatic discharge protection elements with different breakdown voltages in parallel, a single protection circuit structure can clamp surge voltages at multiple different voltage levels, making the protection system universal across various voltage domains without requiring separate dedicated protection circuits for each voltage level.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If the number of electrostatic discharge protection elements is increased to cover more voltage separations, then the protection effectiveness is improved, but the chip space occupancy increases substantially

Engineering Contradiction:
Improveprotection effectivenessVSAvoidchip space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple protection functions into a single integrated protection circuit structure. Instead of placing separate protection circuits for each voltage level, the invention uses a shared protection circuit with multiple parallel electrostatic discharge elements that collectively protect multiple voltage levels. This merging approach significantly reduces the total chip area required compared to having individual protection circuits for each voltage separation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The protection circuit employs a nested structure where multiple electrostatic discharge protection elements are arranged in parallel within a single protection circuit framework. Each protection element operates at a different voltage level, and they are nested together in the same circuit structure, allowing compact integration of multiple protection functions into a unified space-efficient design.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS8416544B2Semiconductor integrated circuit including internal circuits and electrostatic discharge protection circuits
Publication Date: 2013.04.09 RENESAS ELECTRONICS CORP
  • US8416544B2 patent drawing
  • US8416544B2 patent drawing
  • US8416544B2 patent drawing

AI summary

The disclosed invention reduces an increase in the number of electrostatic discharge protection circuits or the number of electrostatic discharge protection elements due to increases in the number of separations of power voltages and the number of separations of ground voltages. A semiconductor integrated circuit includes first, second, and third operation voltage supply terminals; first, second, and third internal circuits; first, second, and third electrostatic discharge protection circuits; and a coupling midpoint. The first, second, and third internal circuits operate at first, second, and third operation voltages supplied to the first, second, and third operation voltage supply terminals, respectively. The first, second, and third electrostatic discharge protection circuits are coupled between the first, second, and third operation voltage supply terminals and the coupling midpoint, respectively. That is, instead of the past Δ (delta) coupling, the first, second, and third electrostatic discharge protection circuits are Y (star)-coupled with respect to the coupling midpoint.