Yield-Based Defect Candidate Detection for Wafer Process Control
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Solution Overview
Problem
The diverse factors affecting semiconductor manufacturing yield make it difficult to analyze the cause of yield reduction effectively, as existing methods struggle to identify defect candidates in a timely and precise manner.
Innovation Solution
A defect candidate detection device utilizing a yield prediction model, yield prediction model analysis circuit, and defect-causing factor detection circuit to analyze process data, identify defect candidates, and control process facilities based on detected factors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If all process data are analyzed to identify yield reduction causes, then detection precision is improved, but analysis time and computational complexity increase significantly
Solution Approach 1:
The patent extracts only the most influential process parameters that contribute to yield variation, rather than analyzing all process data. The yield prediction model identifies key parameters with significant impact on wafer yield, and the defect candidate detection focuses specifically on these extracted parameters, thereby reducing analysis time while maintaining detection precision.
Solution Approach 2:
The patent transforms the analysis approach by changing from comprehensive parameter analysis to targeted parameter analysis based on yield contribution. The system dynamically identifies which parameters have the greatest impact on yield and focuses detection efforts on those parameters, effectively changing the analysis parameters from static comprehensive monitoring to dynamic selective monitoring.
2Measurement precision
If comprehensive process data analysis is performed to identify all defect causes, then detection precision is improved, but device complexity increases
Solution Approach 1:
The patent segments the defect detection system into three distinct functional modules: a yield prediction model that predicts wafer yield based on process data, a yield prediction model analysis circuit that analyzes the prediction results, and a defect-causing factor detection circuit that identifies specific defect candidates. This segmentation allows each module to perform its specific function efficiently, reducing overall system complexity while maintaining high detection precision.
Solution Approach 2:
The patent implements a feedback mechanism where the yield prediction model continuously receives process data, generates predictions, and the analysis circuit uses these predictions to identify defect candidates. The system feeds back the identified defect candidates to control the process facility, creating a closed-loop system that improves precision without requiring overly complex open-loop analysis of all parameters.
3Productivity
If rapid defect detection is implemented to improve productivity, then productivity is improved, but measurement precision may deteriorate
Solution Approach 1:
The patent performs preliminary actions by continuously predicting wafer yield based on process data before actual yield measurement is available. The yield prediction model proactively identifies potential yield issues and the defect candidate detection circuit preemptively identifies defect causes, allowing rapid response without compromising precision because the predictions are based on comprehensive process parameter analysis.
Data Source
AI summary
A defect candidate detection device may include a processor configured to execute computer program instructions, the processor including: a yield prediction model configured to receive a plurality of process data and generate a predicted yield data indicating a predicted yield of a wafer based on the plurality of process data, a yield prediction model analysis circuit configured to generate a yield contribution data based on the plurality of process data and the predicted yield data, where the yield contribution data indicates a degree of influence on a yield of the wafer by each of the plurality of process data, and a defect-causing factor detection circuit that is configured to detect a defect candidate data among the plurality of process data based on the plurality of process data and the yield contribution data and is configured to selectively control a process facility based on the defect candidate data.