Aberration Sensitivity Mapping Using ZCC Kernels in Lithography
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Solution Overview
Problem
Existing methods for determining aberration sensitivity of patterns in lithographic processes are computationally intensive and require significant pre-processing, limiting their efficiency and accuracy in identifying hotspots and optimizing patterning processes.
Innovation Solution
The method involves obtaining first and second sets of Zernike cross coefficient (ZCC) kernels associated with the aberration wavefront of a patterning apparatus, and using these kernels to determine an aberration sensitivity map for a design layout. This map indicates the sensitivity of pattern portions to individual aberrations and their interactions, allowing for the identification of process window limiting patterns (PWLP) with high sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing methods are used to determine aberration sensitivity of patterns, then measurement precision is improved, but computing time increases significantly
Solution Approach 1:
The patent segments the aberration sensitivity determination into two distinct phases: a pre-computation phase that calculates lookup tables (LUTs) containing aberration sensitivity information for various patterns, and a runtime phase that quickly queries these pre-computed LUTs to identify hotspots. This segmentation allows the computationally intensive calculations to be performed once in advance, while production use leverages the pre-computed data for rapid hotspot identification, thereby resolving the contradiction between measurement precision and computing time.
2Manufacturing precision
If comprehensive aberration sensitivity analysis is performed, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent performs preliminary computation of aberration sensitivity lookup tables (LUTs) that encode comprehensive aberration sensitivity analysis results for various patterns before actual production use. These pre-computed LUTs contain pre-analyzed sensitivity information that can be quickly queried during patterning processes. This preliminary action transfers the computational complexity to an offline setup phase, enabling simple and fast runtime operations while maintaining comprehensive analysis capabilities, thus resolving the contradiction between manufacturing precision and device complexity.
Data Source
AI summary
A method for determining process window limiting patterns based on aberration sensitivity associated with a patterning apparatus. The method includes obtaining (i) a first set of kernels and a second set of kernels associated with an aberration wavefront of the patterning apparatus and (ii) a design layout to be printed on a substrate via the patterning apparatus; and determining, via a process simulation using the design layout, the first set of kernels, and the second set of kernels, an aberration sensitivity map associated with the aberration wavefront, the aberration sensitivity map indicating how sensitive one or more portions of the design layout are to an individual aberrations and an interaction between different aberrations; determining, based on the aberration sensitivity map, the process window limiting pattern associated with the design layout having relatively high sensitivity compared to other portions of the design layout.