Zener Diode Layout for Stable DESAT Detection Voltage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional Zener diodes exhibit significant variations in breakdown voltage and temperature characteristics due to non-uniform impurity concentration profiles and tailing in the anode region, leading to instability in semiconductor devices.

Innovation Solution

The semiconductor device employs a Zener diode and emitter base diode connected in the forward direction, with a deeper cathode region and a well region formed using ion implantation and heat treatment to achieve a uniform impurity concentration profile, reducing the variation in breakdown voltage and improving temperature stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a BGR circuit is used for reference voltage generation, then the standard width of DESAT detection voltage can be narrowed, but the chip area becomes large

Engineering Contradiction:
Improvestandard width of DESAT detection voltageVSAvoidchip area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent extracts only the essential function of reference voltage generation from the complex BGR circuit, implementing a simplified version using minimal components (resistors and diodes) that retains the core functionality while dramatically reducing area occupation

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates a simplified copy of the reference voltage generation function, using a basic resistor-diode network that replicates the voltage reference capability without the complex transistor-based BGR structure, achieving area reduction while maintaining functional equivalence

Inventive Principle:
Principle #26Copying

2Ease of manufacture

If conventional Zener diode manufacturing is used, then production is simple, but the breakdown voltage varies significantly

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidbreakdown voltage variation
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent changes the manufacturing parameters by implementing a two-stage ion implantation process with specific dose ratios and energy levels, transforming the impurity concentration profile to achieve uniform breakdown voltage while maintaining manufacturing feasibility

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies local quality improvement by focusing ion implantation treatment specifically on the anode region to eliminate tailing effects, creating a localized correction that improves overall diode performance without complicating the entire manufacturing process

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively narrows the standard width of the DESAT detection voltage, stabilizes the temperature characteristics, and reduces the chip area, enhancing the performance and reliability of the semiconductor device.

Implementation Method 1

forming a cathode region of a first conductivity type in a semiconductor substrate by ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

diffusing the cathode region by a first heat treatment

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 3

forming an anode region of a second conductivity type opposite the first conductivity type in the semiconductor substrate by ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS20240421234A1Semiconductor device and method of manufacturing the same
Publication Date: 2024.12.19 RENESAS ELECTRONICS CORP
  • US20240421234A1 patent drawing
  • US20240421234A1 patent drawing
  • US20240421234A1 patent drawing

AI summary

In a semiconductor substrate, an n-type cathode region, an n-type well region, and a p-type anode region are formed. An impurity concentration of the cathode region is higher than an impurity concentration of the well region. In plan view, the anode region includes the cathode region, and the well region includes the anode region and the cathode region. A depth of the well region from an upper surface of the semiconductor substrate is greater than a depth of the anode region from the upper surface of the semiconductor substrate. A depth of the cathode region from the upper surface of the semiconductor substrate is greater than the respective depths of the anode region and the well region.