Zero-Copy Packet Processing with Header-Only DPU Memory
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Solution Overview
Problem
Existing systems face bandwidth issues and memory overload due to transferring and storing all packets in the data processing unit (DPU) memory, leading to performance degradation in peripheral devices like smart NICs.
Innovation Solution
Storing packet headers in the DPU memory while corresponding payloads remain in the host memory, using descriptors to match processed headers with payloads, enabling efficient processing and reducing memory overload.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If all packets are transferred and stored in the DPU memory for processing, then complete packet processing can be performed, but memory overload and bandwidth issues occur leading to performance degradation
Solution Approach 1:
The packet data is segmented into two parts: headers are transferred to and stored in DPU memory for processing, while payloads remain in host memory. This segmentation allows the DPU to process only the essential header information without being overwhelmed by the entire packet data, thereby reducing memory load while maintaining processing capability.
Solution Approach 2:
The payload portion of each packet is extracted and left in host memory, separate from the DPU memory. Only the necessary header information is taken into the DPU memory for processing. This extraction eliminates unnecessary data from the DPU memory space, preventing memory overload while enabling efficient header processing.
2Ease of operation
If packet headers and payloads are both stored in DPU memory, then all packet data is available for processing, but bandwidth consumption increases and performance degrades
Solution Approach 1:
The payload data is extracted from the data transfer path to the DPU and left in host memory. Only the compact header information is transferred across the PCIe bus to the DPU memory. This extraction dramatically reduces the volume of data transmitted over the bus, lowering bandwidth consumption while maintaining the ability to process packets efficiently by combining headers with payloads from host memory when needed.
Data Source
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AI summary
In one embodiment, a system includes a peripheral device including a memory access interface to receive from a host device headers of packets, while corresponding payloads of the packets are stored in a host memory of the host device, and descriptors being indicative of respective locations in the host memory at which the corresponding payloads are stored, a data processing unit memory to store the received headers and the descriptors without the payloads of the packets, and a data processing unit to process the received headers, wherein the peripheral device is configured, upon completion of the processing of the received headers by the data processing unit, to fetch the payloads of the packets over the memory access interface from the respective locations in the host memory responsively to respective ones of the descriptors, and packet processing circuitry to receive the headers and payloads of the packets, and process the packets.