Zero-Copy Virtual Machine Transfer Through Cache-Line Ownership Tags
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Solution Overview
Problem
Existing methods for transferring data between virtual machines (VMs) involve copying data, which can lead to performance degradation and security risks, especially when using shared memory channels.
Innovation Solution
A data processing system that enables zero-copy memory (ZCM) operations by defining a portion of the host physical address space as a ZCM pool, associating ownership tags with cache lines, and allowing VMs to transfer data without copying by changing ownership tags using CLSND and REP-CLSND instructions, ensuring secure and efficient data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is copied from source VM working storage to shared memory buffer and then to destination VM working storage, then data can be transferred between VMs, but performance is degraded due to multiple memory copy operations
Solution Approach 1:
The patent extracts the data copying operation from the data transfer process by introducing a zero-copy mechanism where data remains in the source VM's working storage and is directly accessible to the destination VM through memory mapping, eliminating the intermediate copy steps to shared memory buffers
Solution Approach 2:
The patent introduces a memory mapping intermediary mechanism that allows the destination VM to access the source VM's working storage directly through a mapped memory address space, serving as a mediator that enables direct access without physical data movement
2Adaptability or versatility
If shared memory channel is used for data transfer between VMs, then data can be exchanged, but security risks arise due to potential data leakage between VMs
Solution Approach 1:
The patent applies local quality by making the memory access permissions specific to each VM's address space mapping, where each destination VM is granted access only to specific regions of the source VM's working storage through controlled memory mapping, rather than providing universal access to shared memory
Solution Approach 2:
The patent segments the memory address space into VM-specific regions with controlled mappings, allowing selective access to specific data regions while maintaining isolation between VMs, rather than using a unified shared memory channel
3Ease of operation
If VMM is used to map memory buffer to source VM working storage and then unmap, then data can be transferred, but performance is degraded due to TLB invalidation flushing all source VM translations
Solution Approach 1:
The patent performs preliminary action by pre-establishing the memory mapping relationship between destination VM and source VM working storage before data transfer, and maintains the mapping throughout the transfer process, avoiding the need for repeated mapping and unmapping operations that cause TLB invalidation
Solution Approach 2:
The patent introduces dynamic memory mapping that allows the mapping to remain active and adaptable during data transfer operations, enabling multiple transfer operations without requiring unmapping and remapping, thus avoiding TLB flushes
Data Source
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AI summary
A processor comprises a core, a cache, and a ZCM manager in communication with the core and the cache. In response to an access request from a first software component, wherein the access request involves a memory address within a cache line, the ZCM manager is to (a) compare an OTAG associated with the memory address against a first ITAG for the first software component, (b) if the OTAG matches the first ITAG, complete the access request, and (c) if the OTAG does not match the first ITAG, abort the access request. Also, in response to a send request from the first software component, the ZCM manager is to change the OTAG associated with the memory address to match a second ITAG for a second software component. Other embodiments are described and claimed.