Zero-Crossing Demodulator Timing Offset Tracking

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Solution Overview

Problem

In wireless communication systems, timing and frequency offsets accumulate over data packet transfers, degrading receiver performance, especially in longer packets, due to differences in transmitter and receiver clock frequencies, which existing technologies fail to effectively correct without severe degradation of OQPSK demodulation performance.

Innovation Solution

A receiver system that includes a signal sampling unit, zero-crossing demodulator, and timing/frequency offset tracking units, which calculate metrics based on zero crossings to compensate timing and frequency offsets by adjusting sampling intervals and mixer frequencies, respectively, using existing demodulation circuitry to minimize complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If initial signal acquisition is performed during baseband wireless modem design, then timing and frequency offsets are initially corrected, but timing and frequency errors continue to accumulate over the duration of data packet transfer due to differences between transmitter and receiver clock frequencies

Engineering Contradiction:

Improveinitial timing and frequency offset correctionVSAvoidreceiver performance during long packet transfer

Core Design Contradiction:

Measurement precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by performing initial timing and frequency offset correction during signal acquisition before data packet transfer begins. This preliminary correction establishes a baseline that prevents severe degradation during subsequent long packet transfers, addressing the contradiction by preparing the system in advance to handle the accumulating errors that will occur during operation.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through continuous monitoring and tracking of timing and frequency offsets during data packet transfer. The system measures the accumulated errors in real-time and applies corrective adjustments, creating a closed-loop control mechanism that maintains receiver performance despite clock frequency differences between transmitter and receiver.

Inventive Principle:

Principle #23Feedback

2Device complexity

If uncorrected timing and frequency offsets accumulate throughout packet transfer, then device complexity remains low, but receiver performance severely degrades especially for longer packets

Engineering Contradiction:

Improveoffset correction mechanismVSAvoiddemodulation performance

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent applies self-service by designing a system where the receiver autonomously tracks and corrects its own timing and frequency offsets using built-in monitoring capabilities. The receiver serves itself by continuously measuring its own performance degradation and applying self-correction, eliminating the need for external intervention or complex external correction mechanisms.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent implements parameter changes by dynamically adjusting sampling timing and frequency compensation parameters during packet transfer. The system modifies these operational parameters in response to measured offset accumulation, allowing it to maintain demodulation performance without requiring a complete system redesign or overly complex correction architecture.

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If maximum frequency offset of about 200 kHz occurs due to 80 ppm clock accuracy in opposite directions, then clock frequency tolerance is within specification, but timing drift of about 0.66 chips over 128 octet packet severely impacts OQPSK demodulation

Engineering Contradiction:

Improveclock frequency toleranceVSAvoidtiming accuracy

Core Design Contradiction:

Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies dynamics by transitioning from static initial offset correction to dynamic continuous tracking and compensation of timing and frequency offsets. The system adapts its correction parameters in real-time during packet transfer, allowing it to handle the cumulative effect of clock frequency differences while maintaining timing accuracy despite the maximum 80 ppm tolerance specified in the standards.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS10079660B2System and method of tracking and compensating for frequency and timing offsets of modulated signals

Publication Date: 2018.09.18 SAMSUNG ELECTRONICS CO LTD

AI summary

According to an embodiment of the present disclosure, a receiver of modulated signals comprises a signal sampling unit configured to sample a signal, a zero-crossing demodulator, and a timing offset tracking unit. The zero-crossing demodulator includes: a zero-crossing counter configured to determine a number of zero crossings for each pulse of the signal, and a symbol selector configured to decode a sequence of pulses as a symbol based on the number of zero crossings in the sequence of pulses. The timing offset tracking unit is configured to: calculate a metric based on an accumulation of the number of zero crossings and corresponding pulse values of the decoded symbol, compare the metric to a predetermined threshold value, and compensate a timing offset of the signal by causing the signal sampling unit to sample the signal at an earlier interval or a later interval in response to the comparison.