Zero-Current Switch Delay Control for Fast Low-Power MOSFET Switching
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Solution Overview
Problem
Conventional zero-current switches face challenges in achieving high-speed operation at low power consumption, as high-speed comparators consume more power and double offset voltages lead to instability and reliability issues in high-frequency applications.
Innovation Solution
A low-power-consumption high-speed zero-current switch design incorporating a delay controller with a gate signal generator, sampling circuit, and current controller forms a negative feedback loop to stabilize turn-on and turn-off voltages, eliminating the need for high-power comparators and enhancing stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed comparators are used to achieve high switching speed, then the switching speed is improved, but power consumption increases
Solution Approach 1:
The patent changes the operating parameters of the comparator by dynamically adjusting the bias current. During critical switching transitions, higher current is supplied to achieve fast switching speed. During steady-state periods, the current is reduced to minimize power consumption. This parameter modulation allows the system to achieve high-speed performance only when necessary, resolving the contradiction between continuous high speed and low power consumption.
Solution Approach 2:
The patent implements dynamic biasing where the comparator's operating point is not fixed but varies over time. The bias circuit adjusts the comparator's current consumption based on the switching state of the power MOSFET. This dynamic adaptation allows the system to optimize the trade-off between speed and power consumption in real-time, rather than being constrained by a static high-current design.
2Speed
If double offset voltages are introduced to achieve advanced turn-on and turn-off, then switching speed is improved, but circuit stability deteriorates
Solution Approach 1:
The patent applies offset voltages in advance of the actual switching event to pre-condition the comparator's decision threshold. By introducing the offset voltage before the switching transition occurs, the comparator is prepared to respond more quickly when the switching condition is met. This preliminary action enables faster switching without requiring continuous instability or multiple offset adjustments during the transition.
Solution Approach 2:
The patent employs feedback mechanisms to monitor the power MOSFET's state and adjust the offset voltage application accordingly. The feedback ensures that offset voltages are applied at the appropriate moments and removed when no longer needed, preventing the comparator instability and multiple pulse problems that occur with continuous or improperly timed offset voltages. This controlled feedback approach maintains stability while achieving speed improvement.
Data Source
AI summary
A low-power-consumption high-speed zero-current switch includes a delay controller, a driving stage and a power transistor MN, wherein: an input of the delay controller is connected with an external clock CLK, an output of the delay controller is connected with an input of the driving stage, and an output of the driving stage is connected with a gate of the power transistor MN; the delay controller includes a gate signal generator, a sampling circuit and a current controller, and three of which form a negative feedback loop for stabilizing the turn-on voltage VON and the turn-off voltage VD to 0, so that when the power transistor MN is turned on or off, the source-drain voltage thereof is 0. The present invention no longer uses a high-power-consumption high-speed comparator, but uses a low-power-consumption delay controller to generate turn-on and turn-off signals of the power transistor.